Advertisement

Applied Physics A

, Volume 95, Issue 4, pp 989–997 | Cite as

Devices and architectures for photonic chip-scale integration

  • J. Ahn
  • M. FiorentinoEmail author
  • R. G. Beausoleil
  • N. Binkert
  • A. Davis
  • D. Fattal
  • N. P. Jouppi
  • M. McLaren
  • C. M. Santori
  • R. S. Schreiber
  • S. M. Spillane
  • D. Vantrease
  • Q. Xu
Article

Abstract

Silicon nanophotonics holds the promise of dramatically advancing the state of the art in computing by enabling parallel architectures that combine unprecedented performance and ease of use with affordable power consumption. This paper presents a design study for a many-core architecture called Corona which utilizes dense wavelength division multiplexing (DWDM) for on- and off-chip communication together with the devices which will be needed to implement such a communication infrastructure.

PACS

42.82.-m 42.82.Ds 42.82.Bq 

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
  2. 2.
    K. Asanovic et al., The landscape of parallel computing research: a view from Berkeley. Technical Report UCB/EECS-2006-183, EECS Department, University of California, Berkeley, December 2006 Google Scholar
  3. 3.
    N. Kirman, M. Kirman, R.K. Dokania, J. Martinez, A.B. Apsel, M.A. Watkins, D.H. Albonesi, Optical technology in future bus-based multicore designs: opportunities and challenges. IEEE Micro 27, 56–66 (2007) CrossRefGoogle Scholar
  4. 4.
    K. Bergman, L. Carloni, Power efficient photonic networks on-chip, in Proc. Soc. Photo-Opt. Instrum. Eng., vol. 6898 (2008), p. 689813 Google Scholar
  5. 5.
    L. Seiler et al., Larrabee: a many-core x86 architecture for visual computing, in SIGGRAPH, August 2008 Google Scholar
  6. 6.
    S. Vangal et al., An 80 Tile 1.28 TFLOPs Network-on-Chip in 65 nm CMOS, in ISSCC, February 2006 Google Scholar
  7. 7.
    D.E. Atkins, K.K. Droegemeier, S.I. Feldman, H. Garcia-Molina, M.L. Klein, D.G. Messerschmitt, P. Messina, J.P. Ostriker, M.H. Wright, Revolutionizing science and engineering through cyberinfrastructure. Report of the National Science Foundation Blue-Ribbon Advisory Panel on Cyberinfrastructure, January 2003 Google Scholar
  8. 8.
    R. Ho, On-chip wires: scaling and efficiency. PhD thesis, Stanford University, 2003 Google Scholar
  9. 9.
    R. Palmer et al., A 14 mW 6.25 Gb/s transceiver in 90 nm CMOS for serial chip-to-chip communications, in ISSCC, February 2007 Google Scholar
  10. 10.
    B. Black et al., Die stacking (3D) Microarchitecture, in Proceedings of the 39th International Symposium on Microarchitecture, December 2006 Google Scholar
  11. 11.
    A. Liu, R. Jones, L. Liao, D. Samara-Rubio, D. Rubin, O. Cohen, R. Nicolaescu, M.J. Paniccia, A high-speed silicon optical modulator based on a metal-oxide-semiconductor capacitor. Nature 427, 615–618 (2004) CrossRefADSGoogle Scholar
  12. 12.
    A. Kovsh, I. Krestnikov, D. Livshits, S. Mikhrin, J. Weimert, A. Zhukov, Quantum dot laser with 75 nm broad spectrum of emission. Opt. Lett. 32, 793–795 (2007) CrossRefADSGoogle Scholar
  13. 13.
    A. Gubenko, I. Krestnikov, D. Livshtis, S. Mikhrin, A. Kovsh, L. West, C. Bornholdt, N. Grote, A. Zhukov, Error-free 10 Gbit/s transmission using individual Fabry–Perot modes of low-noise quantum-dot laser. Electron. Lett. 43, 1430–1431 (2007) CrossRefGoogle Scholar
  14. 14.
  15. 15.
    B.R. Koch, A.W. Fang, O. Cohen, J.E. Bowers, Mode-locked silicon evanescent lasers. Opt. Express 15, 11225–11233 (2007) CrossRefADSGoogle Scholar
  16. 16.
    W.M. Green, M.J. Rooks, L. Sekaric, Y.A. Vlasov, Ultra-compact, low RF power, 10 Gb/s silicon Mach–Zehnder modulator. Opt. Express 15, 17106–17113 (2007) CrossRefADSGoogle Scholar
  17. 17.
    Y.-H. Kuo, Y.-K. Lee, Y. Ge, S. Ren, J.E. Roth, T.I. Kamins, D.A.B. Miller, J.S. Harris, Strong quantum-confined stark effect in germanium quantum-well structures on silicon. Nature 437, 1334–1336 (2005) CrossRefADSGoogle Scholar
  18. 18.
    J.E. Roth, O. Fidaner, R.K. Schaevitz, Y.-H. Kuo, T.I. Kamins, J.S. Harris, D.A.B. Miller, Optical modulator on silicon employing germanium quantum wells. Opt. Express 15, 5851–5859 (2007) CrossRefADSGoogle Scholar
  19. 19.
    Q. Xu, B. Schmidt, S. Pradhan, M. Lipson, Micrometre-scale silicon electro-optic modulator. Nature 435, 325–327 (2005) CrossRefADSGoogle Scholar
  20. 20.
    Q. Xu, B. Schmidt, J. Shakya, M. Lipson, Cascaded silicon micro-ring modulators for WDM optical interconnection. Opt. Express 14, 9430–9435 (2006) ADSGoogle Scholar
  21. 21.
    Q. Xu, S. Manipatruni, B. Schmidt, J. Shakya, M. Lipson, 12.5 Gbit/s carrier-injection-based silicon micro-ring silicon modulators. Opt. Express 15, 430–436 (2006) ADSCrossRefGoogle Scholar
  22. 22.
    S. Xiao, M.H. Khan, H. Shen, M. Qi, A highly compact third-order silicon microring add-drop filter with a very large free spectral range, a flat passband and a low delay dispersion. Opt. Express 15, 14765–14771 (2007) CrossRefADSGoogle Scholar
  23. 23.
    M.S. Nawrocka, T. Liu, X. Wang, R.R. Panepucci, Tunable silicon microring resonator with wide free spectral range. Appl. Phys. Lett. 89, 071110 (2006) CrossRefADSGoogle Scholar
  24. 24.
    Q. Xu, D. Fattal, R.G. Beausoleil, Silicon microring resonators with 1.5-μm radius. Opt. Express, 16, 4309–4315 (2008) CrossRefADSGoogle Scholar
  25. 25.
    M. Lipson, Guiding, modulating, and emitting light on silicon challenges and opportunities. J. Lightwave Technol. 23, 4222 (2005) CrossRefADSGoogle Scholar
  26. 26.
    D. Vantrease et al., Corona: system implications of emerging nanophotonic technology, in International Symposium on Computer Architecture (2008), pp. 153–164 Google Scholar
  27. 27.
    T. Yin et al., 31 GHz Ge n-i-p waveguide photodetectors on silicon-on-insulator substrate. Opt. Express 15, 13965 (2006) Google Scholar
  28. 28.
    S.C. Woo, M. Ohara, E. Torrie, J.P. Singh, A. Gupta, The SPLASH-2 programs: characterization and methodological considerations, in International Symposium on Computer Architecture (1995) Google Scholar
  29. 29.
    A. Falcon, P. Faraboschi, D. Ortega, Combining simulation and virtualization through dynamic sampling, in ISPASS, April 2007 Google Scholar
  30. 30.
    N.L. Binkert, R.G. Dreslinski, L.R. Hsu, K.T. Lim, A.G. Saidi, S.K. Reinhardt, The M5 simulator: modeling networked systems. IEEE Micro 26(4) (2006) Google Scholar

Copyright information

© Springer-Verlag 2009

Authors and Affiliations

  • J. Ahn
    • 1
  • M. Fiorentino
    • 1
    Email author
  • R. G. Beausoleil
    • 1
  • N. Binkert
    • 1
  • A. Davis
    • 1
  • D. Fattal
    • 1
  • N. P. Jouppi
    • 1
  • M. McLaren
    • 1
  • C. M. Santori
    • 1
  • R. S. Schreiber
    • 1
  • S. M. Spillane
    • 1
  • D. Vantrease
    • 1
  • Q. Xu
    • 1
  1. 1.HP LaboratoriesPalo AltoUSA

Personalised recommendations