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Practical synthesis of reactive systems from LTL specifications via parity games

You can teach an old dog new tricks: making a classic approach structured, forward-explorative, and incremental

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Abstract

The synthesis of reactive systems from linear temporal logic (LTL) specifications is an important aspect in the design of reliable software and hardware. We present our adaption of the classic automata-theoretic approach to LTL synthesis, implemented in the tool Strix which has won the two last synthesis competitions (Syntcomp2018/2019). The presented approach is (1) structured, meaning that the states used in the construction have a semantic structure that is exploited in several ways, it performs a (2) forward exploration such that it often constructs only a small subset of the reachable states, and it is (3) incremental in the sense that it reuses results from previous inconclusive solution attempts. Further, we present and study different guiding heuristics that determine where to expand the on-demand constructed arena. Moreover, we show several techniques for extracting an implementation (Mealy machine or circuit) from the witness of the tree-automaton emptiness check. Lastly, the chosen constructions use a symbolic representation of the transition functions to reduce runtime and memory consumption. We evaluate the proposed techniques on the Syntcomp2019 benchmark set and show in more detail how the proposed techniques compare to the techniques implemented in other leading LTL synthesis tools.

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Notes

  1. 1.

    See [3] for an introduction to reactive synthesis and related graph games.

  2. 2.

    https://strix.model.in.tum.de/.

  3. 3.

    We will later see the advantage of using nondeterministic strategies (multiple actions allowed) compared to deterministic strategies (only one action allowed).

  4. 4.

    We represent the intermediate states simply by circular shaped nodes in the figures.

  5. 5.

    Should \({{\mathcal {O}}}_{\delta }\) determine that all automata will accept any possible input–output pairs from now on, it simplifies the successor state to \(\top \) which, again by construction, is always won by .

  6. 6.

    Actually, the edges are also labeled by corresponding inputs and outputs coming from the environment and the controller, respectively.

  7. 7.

    http://www.syntcomp.org/.

  8. 8.

    Strix was ranked on the first place.

  9. 9.

    ...or \(|\log _{10} \frac{x + 1}{y + 1}|\) to compensate for circuits of size 0.

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Acknowledgements

We want to thank the anonymous reviewers for their helpful comments and remarks on this manuscript. We also want to thank Swen Jacobs and Guillermo A. Pérez for valuable feedback and testing of Strix during Syntcomp2019.

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Correspondence to Salomon Sickert.

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This work was partially funded and supported by the German Research Foundation (DFG) projects ‘Game-based Synthesis for Industrial Automation’ (253384115) and ‘Verified Model Checkers’ (317422601) and the ERC Advanced Grant No. 787367 (PaVeS)

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Luttenberger, M., Meyer, P.J. & Sickert, S. Practical synthesis of reactive systems from LTL specifications via parity games. Acta Informatica (2019). https://doi.org/10.1007/s00236-019-00349-3

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