Acta Informatica

, Volume 53, Issue 3, pp 247–299 | Cite as

Extracting unsatisfiable cores for LTL via temporal resolution

  • Viktor SchuppanEmail author
Original Article


Unsatisfiable cores (UCs) are a well established means for debugging in a declarative setting. Still, there are few tools that perform automated extraction of UCs for LTL. Existing tools compute a UC as an unsatisfiable subset of the set of top-level conjuncts of an LTL formula. Using resolution graphs to extract UCs is common in other domains such as SAT. In this article we construct and optimize resolution graphs for temporal resolution as implemented in the temporal resolution-based solver TRP++, and we use them to extract UCs for propositional LTL. The resulting UCs are more fine-grained than the UCs obtained from existing tools because UC extraction also simplifies top-level conjuncts instead of treating them as atomic entities. For example, given an unsatisfiable LTL formula of the form \( \phi \equiv {(\mathbf{G}{ \psi })}\wedge {\mathbf{F}{ \psi ' }}\) existing tools return \( \phi \) as a UC irrespective of the complexity of \( \psi \) and \( \psi ' \), whereas the approach presented in this article continues to remove parts not required for unsatisfiability inside \( \psi \) and \( \psi ' \). Our approach also identifies groups of occurrences of a proposition that do not interact in a proof of unsatisfiability. We implement our approach in TRP++. Our experimental evaluation demonstrates that our approach (i) extracts UCs that are often significantly smaller than the input formula with an acceptable overhead and (ii) produces more fine-grained UCs than competing tools while remaining at least competitive in terms of run time and memory usage. The source code of our tool is publicly available.



I am grateful to Boris Konev and Michel Ludwig for making TRP++ and TSPASS (which are the basis of this paper) including their LTL translators available and for answering my questions. I thank Rajeev Goré, Zhe Hou, Timothy Sergeant, and Jimmy Thomson for availability of and discussion about PLTL-MUP and procmine as well as Daniel Kroening, Mitra Purandare, and Thomas Wahl for availability of and discussion about Aardvark. I thank Alessandro Cimatti for bringing up the subject of temporal resolution. I also thank the reviewers of the current and previous iterations of this article for their helpful feedback. Initial parts of the work were performed while working under a grant by the Provincia Autonoma di Trento (project EMTELOS).


  1. 1.
    Amjad, H.: Compressing propositional refutations. In: Merz, S., Nipkow, T. (eds.) AVoCS, Elsevier, Electr. Notes Theor. Comput. Sci., vol. 185, pp. 3–15 (2006)Google Scholar
  2. 2.
    Armoni, R., Fix, L., Flaisher, A., Grumberg, O., Piterman, N., Tiemeyer, A., Vardi, M.: Enhanced vacuity detection in linear temporal logic. In: Hunt. Jr., W., Somenzi, F. (eds.) CAV, Springer, LNCS, vol. 2725, pp. 368–380 (2003)Google Scholar
  3. 3.
    Awad, A., Goré, R., Hou, Z., Thomson, J., Weidlich, M.: An iterative approach to synthesize business process templates from compliance rules. Inf. Syst. 37(8), 714–736 (2012)CrossRefGoogle Scholar
  4. 4.
    Baader, F., Calvanese, D., McGuinness, D., Nardi, D., Patel-Schneider, P. (eds.): The Description Logic Handbook: Theory, Implementation, and Applications. Cambridge University Press, Cambridge (2007)zbMATHGoogle Scholar
  5. 5.
    Bachmair, L., Ganzinger, H.: Resolution theorem proving. In: Robinson, J., Voronkov, A. (eds.) Handbook of Automated Reasoning, pp. 19–99. Elsevier and MIT Press, Amsterdam and Cambridge (2001)CrossRefGoogle Scholar
  6. 6.
    Bakker, R., Dikker, F., Tempelman, F., Wognum, P.: Diagnosing and solving over-determined constraint satisfaction problems. In: IJCAI, pp. 276–281 (1993)Google Scholar
  7. 7.
    Barrett, C., Sebastiani, R., Seshia, S., Tinelli, C.: Satisfiability modulo theories. In: Biere, A., Heule, M., van Maaren, H., Walsh, T. (eds.) Handbook of Satisfiability, Frontiers in Artificial Intelligence and Applications, vol. 185, pp. 825–885. IOS Press, Amsterdam (2009)Google Scholar
  8. 8.
    Beatty, D., Bryant, R.: Formally verifying a microprocessor using a simulation methodology. In: DAC, pp. 596–602 (1994)Google Scholar
  9. 9.
    Beer, I., Ben-David, S., Eisner, C., Rodeh, Y.: Efficient detection of vacuity in temporal model checking. Form. Methods Syst. Des. 18(2), 141–163 (2001)CrossRefzbMATHGoogle Scholar
  10. 10.
    Behdenna, A., Dixon, C., Fisher, M.: Deductive verification of simple foraging robotic behaviours. Int. J. Intell. Comput. Cybern. 2(4), 604–643 (2009)MathSciNetCrossRefzbMATHGoogle Scholar
  11. 11.
    Belov, A., Marques Silva, J.: Minimally unsatisfiable Boolean circuits. In: Sakallah, K., Simon, L. (eds.) SAT, Springer, LNCS, vol. 6695, pp. 145–158 (2011)Google Scholar
  12. 12.
    Biere, A.: Bounded model checking. In: Biere, A., Heule, M., van Maaren, H., Walsh, T. (eds.) Handbook of Satisfiability, Frontiers in Artificial Intelligence and Applications, vol. 185, pp. 457–481. IOS Press, Amsterdam (2009)Google Scholar
  13. 13.
    Biere, A., Heljanko, K., Junttila, T., Latvala, T., Schuppan, V.: Linear encodings of bounded LTL model checking. Log. Methods Comput. Sci. 2(5), (2006)Google Scholar
  14. 14.
    Bloem, R., Galler, S., Jobstmann, B., Piterman, N., Pnueli, A., Weiglhofer, M.: Specify, compile, run: hardware from PSL. In: Glesner, S., Knoop, J., Drechsler, R. (eds.) COCV, Elsevier, Electr. Notes Theor. Comput. Sci., vol. 190(4), pp. 3–16 (2007)Google Scholar
  15. 15.
    Bruni, R., Sassano, A.: Restoring satisfiability or maintaining unsatisfiability by finding small unsatisfiable subformulae. In: Kautz H, Selman B (eds.) SAT, Elsevier, Electronic Notes in Discrete Mathematics, vol. 9, pp. 162–173 (2001)Google Scholar
  16. 16.
    Büning, H.K., Kullmann, O.: Minimal unsatisfiability and autarkies. In: Biere, A., Heule, M., van Maaren, H., Walsh, T. (eds.) Handbook of Satisfiability, Frontiers in Artificial Intelligence and Applications, vol. 185, pp. 339–401. IOS Press, Amsterdam (2009)Google Scholar
  17. 17.
    Burch, J., Clarke, E., McMillan, K., Dill, D., Hwang, L.: Symbolic model checking: \(10^{20}\) states and beyond. Inf. Comput. 98(2), 142–170 (1992)MathSciNetCrossRefzbMATHGoogle Scholar
  18. 18.
    Chiappini, A., Cimatti, A., Macchi, L., Rebollo, O., Roveri, M., Susi, A., Tonetta, S., Vittorini, B.: Formalization and validation of a subset of the European Train Control System. In: Kramer, J., Bishop, J., Devanbu, P., Uchitel, S. (eds.) ICSE (2), ACM, pp. 109–118 (2010)Google Scholar
  19. 19.
    Chinneck, J., Dravnieks, E.: Locating minimal infeasible constraint sets in linear programs. INFORMS J. Comput. 3(2), 157–168 (1991)CrossRefzbMATHGoogle Scholar
  20. 20.
    Cimatti, A., Clarke, E., Giunchiglia, E., Giunchiglia, F., Pistore, M., Roveri, M., Sebastiani, R., Tacchella, A.: NuSMV 2: An opensource tool for symbolic model checking. In: Brinksma, E., Larsen, K. (eds.) CAV, Springer, LNCS, vol. 2404, pp. 359–364 (2002)Google Scholar
  21. 21.
    Cimatti, A., Roveri, M., Schuppan, V., Tonetta, S.: Boolean abstraction for temporal logic satisfiability. In: Damm, W., Hermanns, H. (eds.) CAV, Springer, LNCS, vol. 4590, pp. 532–546 (2007)Google Scholar
  22. 22.
    Cimatti, A., Roveri, M., Schuppan, V., Tchaltsev, A.: Diagnostic information for realizability. In: Logozzo, F., Peled, D., Zuck, L. (eds.) VMCAI, Springer, LNCS, vol. 4905, pp. 52–67 (2008)Google Scholar
  23. 23.
    Cimatti, A., Griggio, A., Sebastiani, R.: Computing small unsatisfiable cores in satisfiability modulo theories. J. Artif. Intell. Res. (JAIR) 40, 701–728 (2011)MathSciNetzbMATHGoogle Scholar
  24. 24.
    Cimatti, A., Mover, S., Tonetta, S.: Proving and explaining the unfeasibility of message sequence charts for hybrid systems. In: Bjesse, P., Slobodová, A. (eds.) FMCAD, FMCAD Inc., pp. 54–62 (2011)Google Scholar
  25. 25.
    Clarke, E., Grumberg, O., Hamaguchi, K.: Another look at LTL model checking. Form. Methods Syst. Des. 10(1), 47–71 (1997)CrossRefGoogle Scholar
  26. 26.
    Clarke, E., Grumberg, O., Peled, D.: Model Checking. MIT Press, Cambridge (2001)CrossRefGoogle Scholar
  27. 27.
    Clarke, E., Talupur, M., Veith, H., Wang, D.: SAT based predicate abstraction for hardware verification. In: Giunchiglia, E., Tacchella, A. (eds.) SAT, Springer, LNCS, vol. 2919, pp. 78–92 (2003)Google Scholar
  28. 28.
    De Wulf, M., Doyen, L., Maquet, N., Raskin, J.: Antichains: alternative algorithms for LTL satisfiability and model-checking. In: Ramakrishnan, C., Rehof, J. (eds.) TACAS, Springer, LNCS, vol. 4963, pp. 63–77 (2008)Google Scholar
  29. 29.
    Demri, S., Schnoebelen, P.: The complexity of propositional linear temporal logics in simple cases. Inf. Comput. 174(1), 84–103 (2002)MathSciNetCrossRefzbMATHGoogle Scholar
  30. 30.
    Dixon, C.: Strategies for temporal resolution. PhD thesis, Department of Computer Science, University of Manchester. (1995)
  31. 31.
    Dixon, C.: Using Otter for temporal resolution. In: Barringer, H., Fisher, M., Gabbay, D., Gough, G. (eds.) ICTL, Springer, Applied Logic Series, vol. 16, pp. 149–166 (1997)Google Scholar
  32. 32.
    Dixon, C.: Temporal resolution using a breadth-first search algorithm. Ann. Math. Artif. Intell. 22(1–2), 87–115 (1998)MathSciNetCrossRefzbMATHGoogle Scholar
  33. 33.
    D’Silva, V., Kroening, D., Purandare, M., Weissenbacher, G.: Interpolant strength. In: Barthe, G., Hermenegildo, M. (eds.) VMCAI, Springer, LNCS, vol. 5944, pp. 129–145 (2010)Google Scholar
  34. 34.
    Eisner, C., Fisman, D.: A Practical Introduction to PSL. Springer, Berlin (2006)Google Scholar
  35. 35.
    Emerson, E.: Temporal and modal logic. In: van Leeuwen, J. (ed.) Handbook of Theoretical Computer Science, Volume B: Formal Models and Sematics, pp. 995–1072. Elsevier and MIT Press, Amsterdam and Cambridge (1990)Google Scholar
  36. 36.
    Fisher, M.: A resolution method for temporal logic. In: IJCAI, pp. 99–104 (1991)Google Scholar
  37. 37.
    Fisher, M., Noël, P.: Transformation and synthesis in MetateM. Part I: propositional MetateM. Tech. Rep. UMCS-92-2-1, University of Manchester, Department of Computer Science. (1992)
  38. 38.
    Fisher, M., Dixon, C., Peim, M.: Clausal temporal resolution. ACM Trans. Comput. Log. 2(1), 12–56 (2001)MathSciNetCrossRefGoogle Scholar
  39. 39.
    Fisman, D., Kupferman, O., Sheinvald-Faragy, S., Vardi, M.: A framework for inherent vacuity. In: Chockler, H., Hu, A. (eds.) HVC, Springer, LNCS, vol. 5394, pp. 7–22 (2008)Google Scholar
  40. 40.
    Gheorghiu, M., Gurfinkel, A.: VaqUoT: A tool for vacuity detection. In: Misra, J., Nipkow, T., Sekerinski, E. (eds.) FM, Springer, LNCS, vol. 4085, tool presentation. (2006)
  41. 41.
    Goldberg, E., Novikov, Y.: Verification of proofs of unsatisfiability for CNF formulas. In: DATE, IEEE Computer Society, pp. 10886–10891 (2003)Google Scholar
  42. 42.
    Goré, R., Huang, J., Sergeant, T., Thomson, J.: Finding Minimal Unsatisfiable Subsets in Linear Temporal Logic using BDDs. (2013)
  43. 43.
    Gurfinkel, A., Chechik, M.: How vacuous is vacuous? In: Jensen, K., Podelski, A. (eds.) TACAS, Springer, LNCS, vol. 2988, pp. 451–466 (2004)Google Scholar
  44. 44.
    Halpern, J., Reif, J.: The propositional dynamic logic of deterministic, well-structured programs. Theor. Comput. Sci. 27, 127–165 (1983)MathSciNetCrossRefzbMATHGoogle Scholar
  45. 45.
    Hantry, F., Hacid, M.: Handling conflicts in depth-first search for LTL tableau to debug compliance based languages. In: Pimentel, E., Valero, V. (eds.) FLACOS, EPTCS, vol. 68, pp. 39–53 (2011)Google Scholar
  46. 46.
    Hantry, F., Saïs, L., Hacid, M.: On the complexity of computing minimal unsatisfiable LTL formulas. Electron. Colloq. Comput. Complex. (ECCC) 19(69), (2012)Google Scholar
  47. 47.
    Harding, A.: Symbolic strategy synthesis for games with LTL winning conditions. PhD thesis, University of Birmingham (2005)Google Scholar
  48. 48.
    Heuerding, A., Jäger, G., Schwendimann, S., Seyfried, M.: Propositional logics on the computer. In: Baumgartner, P., Hähnle, R., Posegga, J. (eds.) TABLEAUX, Springer, LNCS, vol. 918, pp. 310–323 (1995)Google Scholar
  49. 49.
    Hoos, H.: Heavy-tailed behaviour in randomised systematic search algorithms for SAT? Tech. Rep. TR-99-16, University of British Columbia, Department of Computer Science (1999)Google Scholar
  50. 50.
    Horridge, M.: Justification based explanation in ontologies. PhD thesis, School of Computer Science, Faculty of Engineering and Physical Sciences, University of Manchester. (2011)
  51. 51.
    Huang, J.: MUP: a minimal unsatisfiability prover. In: Tang, T. (ed.) ASP-DAC, pp. 432–437. ACM Press, Nre York (2005)CrossRefGoogle Scholar
  52. 52.
    Hustadt, U., Konev, B.: TRP++ 2.0: a temporal resolution prover. In: Baader, F. (ed.) CADE, Springer, LNCS, vol. 2741, pp. 274–278 (2003)Google Scholar
  53. 53.
    Hustadt, U., Konev, B.: TRP++: a temporal resolution prover. In: Baaz, M., Makowsky, J., Voronkov, A. (eds.) Collegium Logicum, vol. 8, Kurt Gödel Society, pp. 65–79 (2004)Google Scholar
  54. 54.
    Hustadt, U., Schmidt, R.A.: Scientific benchmarking with temporal logic decision procedures. In: Fensel, D., Giunchiglia, F., McGuinness, D., Williams, M. (eds.) KR, Morgan Kaufmann, pp. 533–546 (2002)Google Scholar
  55. 55.
    Jobstmann, B., Bloem, R.: Optimizations for LTL synthesis. In: FMCAD, IEEE Computer Society, pp. 117–124 (2006)Google Scholar
  56. 56.
    Josuttis, N.: The C++ Standard Library: A Tutorial and Reference, 2nd edn. Addison-Wesley, Reading (2012)Google Scholar
  57. 57.
    Junker, U.: QuickXplain: conflict detection for arbitrary constraint propagation algorithms. In: CONS. (2001)
  58. 58.
    Jussila, T., Sinz, C., Biere, A.: Extended resolution proofs for symbolic SAT solving with quantification. In: Biere, A., Gomes, C. (eds.) SAT, Springer, LNCS, vol. 4121, pp. 54–60 (2006)Google Scholar
  59. 59.
    Kesten, Y., Pnueli, A., Raviv, L.: Algorithmic verification of linear temporal logic specifications. In: Larsen, K., Skyum, S., Winskel, G. (eds.) ICALP, Springer, LNCS, vol. 1443, pp. 1–16 (1998)Google Scholar
  60. 60.
    Könighofer, R., Hofferek, G., Bloem, R.: Debugging formal specifications using simple counterstrategies. In: FMCAD, IEEE, pp. 152–159 (2009)Google Scholar
  61. 61.
    Könighofer, R., Hofferek, G., Bloem, R.: Debugging unrealizable specifications with model-based diagnosis. In: Barner, S., Harris, I., Kroening, D., Raz, O. (eds.) HVC, Springer, LNCS, vol. 6504, pp. 29–45 (2010)Google Scholar
  62. 62.
    Kress-Gazit, H., Fainekos, G., Pappas, G.: Translating structured English to robot controllers. Adva. Rob. 22(12), 1343–1359 (2008)CrossRefGoogle Scholar
  63. 63.
    Kupferman, O.: Sanity checks in formal verification. In: Baier, C., Hermanns, H. (eds.) CONCUR, Springer, LNCS, vol. 4137, pp. 37–51 (2006)Google Scholar
  64. 64.
    Kupferman, O., Vardi, M.: Vacuity detection in temporal model checking. STTT 4(2), 224–233 (2003)CrossRefzbMATHGoogle Scholar
  65. 65.
    Lichtenstein, O., Pnueli, A.: Checking that finite state concurrent programs satisfy their linear specification. In: Van Deusen, M., Galil, Z., Reid, B. (eds.) POPL, pp. 97–107. ACM Press, New York (1985)Google Scholar
  66. 66.
    Ludwig, M., Hustadt, U.: Implementing a fair monodic temporal logic prover. AI Commun. 23(2–3), 69–96 (2010)MathSciNetzbMATHGoogle Scholar
  67. 67.
    Marques-Silva, J.: Computing minimally unsatisfiable subformulas: State of the art and future directions. Mult. Valued Log. Soft Comput. 19(1–3), 163–183 (2012)MathSciNetGoogle Scholar
  68. 68.
    Marques-Silva, J., Janota, M.: Computing minimal sets on propositional formulae i: problems & reductions. arXiv:1402.3011 [cs.LO] (2014)
  69. 69.
    Nadel, A.: Understanding and improving a modern SAT solver. PhD thesis, The Blavatnik School of Computer Science, Raymond and Beverly Sackler Faculty of Exact Sciences, Tel Aviv University. (2009)
  70. 70.
    Namjoshi, K.: An efficiently checkable, proof-based formulation of vacuity in model checking. In: Alur, R., Peled, D. (eds.) CAV, Springer, LNCS, vol. 3114, pp. 57–69 (2004)Google Scholar
  71. 71.
    Noël, P.: A transformation-based synthesis of temporal specifications. Form. Asp. Comput. 7(6), 587–619 (1995)CrossRefzbMATHGoogle Scholar
  72. 72.
    Peled, D.: Software Reliability Methods. Texts in Computer Science. Springer, Berlin (2001)CrossRefGoogle Scholar
  73. 73.
    Pesic, M., van der Aalst, W.: A declarative approach for flexible business processes management. In: Eder, J., Dustdar, S. (eds.) Business Process Management Workshops, Springer, LNCS, vol. 4103, pp. 169–180 (2006)Google Scholar
  74. 74.
    Pill, I., Semprini, S., Cavada, R., Roveri, M., Bloem, R., Cimatti, A.: Formal analysis of hardware requirements. In: Sentovich, E. (ed.) DAC, ACM, pp. 821–826 (2006)Google Scholar
  75. 75.
    Plaisted, D., Greenbaum, S.: A structure-preserving clause form translation. J. Symb. Comput. 2(3), 293–304 (1986)MathSciNetCrossRefzbMATHGoogle Scholar
  76. 76.
    Purandare, M., Wahl, T., Kroening, D.: Strengthening properties using abstraction refinement. In: DATE, IEEE, pp. 1692–1697 (2009)Google Scholar
  77. 77.
    Raman, V., Kress-Gazit, H.: Analyzing unsynthesizable specifications for high-level robot behavior using LTLMoP. In: Gopalakrishnan, G., Qadeer, S. (eds.) CAV, Springer, LNCS, vol. 6806, pp. 663–668 (2011)Google Scholar
  78. 78.
    Rollini, S., Bruttomesso, R., Sharygina, N., Tsitovich, A.: Resolution proof transformation for compression and interpolation. Form. Methods Syst. Des. 45(1), 1–41 (2014)CrossRefzbMATHGoogle Scholar
  79. 79.
    Rozier, K., Vardi, M.: LTL satisfiability checking. STTT 12(2), 123–137 (2010)CrossRefGoogle Scholar
  80. 80.
    Schlobach, S., Cornet, R.: Non-standard reasoning services for the debugging of description logic terminologies. In: Gottlob, G., Walsh, T. (eds.) IJCAI, Morgan Kaufmann, pp. 355–362 (2003)Google Scholar
  81. 81.
    Schuppan, V.: Extracting unsatisfiable cores for LTL via temporal resolution. arXiv:1212.3884v1 [cs.LO] (2012)
  82. 82.
    Schuppan, V.: Towards a notion of unsatisfiable and unrealizable cores for LTL. Sci. Comput. Program. 77(7–8), 908–939 (2012)CrossRefzbMATHGoogle Scholar
  83. 83.
    Schuppan, V.: Enhancing unsatisfiable cores for LTL with information on temporal relevance. In: Bortolussi, L., Wiklicky, H. (eds.) QAPL, EPTCS, vol. 117, pp. 49–65 (2013)Google Scholar
  84. 84.
    Schuppan, V.: Extracting unsatisfiable cores for LTL via temporal resolution. In: Sanchez, C., Venable, B., Zimanyi, E. (eds.) TIME, IEEE Computer Society, pp. 54–61 (2013)Google Scholar
  85. 85.
    Schuppan, V.: Extracting unsatisfiable cores for LTL via temporal resolution (full version). arXiv:1212.3884 [cs.LO] (2015)
  86. 86.
    Schuppan, V., Darmawan, L.: Evaluating LTL satisfiability solvers. In: Bultan, T., Hsiung, P. (eds.) ATVA, Springer, LNCS, vol. 6996, pp. 397–413 (2011)Google Scholar
  87. 87.
    Shlyakhter, I.: Declarative symbolic pure-logic model checking. PhD thesis, Department of Electrical Engineering and Computer Science, Massachusets Institute of Technology. (2005)
  88. 88.
    Shlyakhter, I., Seater, R., Jackson, D., Sridharan, M., Taghdiri, M.: Debugging overconstrained declarative models using unsatisfiable cores. In: ASE, IEEE Computer Society, pp. 94–105 (2003)Google Scholar
  89. 89.
    Siek, J., Lee, L., Lumsdaine, A.: The Boost Graph Library—User Guide and Reference Manual. C++ in-depth series. Pearson/Prentice Hall, Englewood Cliffs (2002)Google Scholar
  90. 90.
    Simmonds, J., Davies, J., Gurfinkel, A.: VaqTree: Efficient vacuity detection for bounded model checking. In: Misra, J., Nipkow, T., Sekerinski, E. (eds.) FM, Springer, LNCS, vol. 4085, tool presentation. (2006)
  91. 91.
    Simmonds, J., Davies, J., Gurfinkel, A., Chechik, M.: Exploiting resolution proofs to speed up LTL vacuity detection for BMC. STTT 12(5), 319–335 (2010)CrossRefGoogle Scholar
  92. 92.
    Sistla, A., Clarke, E.: The complexity of propositional linear temporal logics. J. ACM 32(3), 733–749 (1985)MathSciNetCrossRefzbMATHGoogle Scholar
  93. 93.
    The VIS Group: VIS: A system for verification and synthesis. In: Alur, R., Henzinger, T. (eds.) CAV, Springer, LNCS, vol. 1102, pp. 428–432 (1996)Google Scholar
  94. 94.
    Torlak, E., Chang, F.S.H., Jackson, D.: Finding minimal unsatisfiable cores of declarative specifications. In: Cuéllar, J., Maibaum, T., Sere, K. (eds.) FM, Springer, LNCS, vol. 5014, pp. 326–341 (2008)Google Scholar
  95. 95.
    Van Gelder, A.: Extracting (easily) checkable proofs from a satisfiability solver that employs both preorder and postorder resolution, AI&M 24–2002. Seventh International Symposium on Artificial Intelligence and Mathematics, January 2–4, 2002, Fort Lauderdale, Florida (2002)Google Scholar
  96. 96.
    Whalley, D.: Automatic isolation of compiler errors. ACM Trans. Program. Lang. Syst. 16(5), 1648–1659 (1994)CrossRefGoogle Scholar
  97. 97.
    Zeller, A., Hildebrandt, R.: Simplifying and isolating failure-inducing input. IEEE Trans. Softw. Eng. 28(2), 183–200 (2002)CrossRefGoogle Scholar
  98. 98.
    Zhang, L.: Searching for truth: techniques for satisfiability of Boolean formulas. PhD thesis, Department of Electrical Engineering, Princeton University (2003)Google Scholar
  99. 99.
    Zhang, L., Malik, S.: Validating SAT solvers using an independent resolution-based checker: Practical implementations and other applications. In: DATE, IEEE Computer Society, pp. 10880–10885 (2003)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2015

Authors and Affiliations

  1. 1.FüssenGermany

Personalised recommendations