Acta Informatica

, Volume 44, Issue 7–8, pp 525–569 | Cite as

Synchronous cooperation for explicit multi-threading

Open Access
Original Article

Abstract

We develop an algebraic theory of threads, synchronous cooperation of threads and interaction of threads with Maurer machines, and investigate program parallelization using the resulting theory. Program parallelization underlies techniques for speeding up instruction processing on a computer that make use of the abilities of the computer to process instructions simultaneously in cases where the state changes involved do no influence each other. One of our findings is that a strong induction principle is needed when proving theorems about sufficient conditions for the correctness of program parallelizations. The induction principle introduced has brought us to construct a projective limit model for the theory developed.

References

  1. 1.
    de Bakker, J.W., Bergstra, J.A., Klop, J.W., Meyer, J.J.C. (1984). Linear time and branching time semantics for recursion with merge. Theor. Comput. Sci. 34: 135–156 MATHCrossRefGoogle Scholar
  2. 2.
    de Bakker, J.W., Zucker, J.I. (1982). Processes and the denotational semantics of concurrency. Inform. Control 54(1/2): 70–120 MATHGoogle Scholar
  3. 3.
    Bergstra J.A. and Bethke I. (2003). Polarized process algebra and program equivalence. In: Baeten, J.C.M., Lenstra, J.K., Parrow, J. and Woeginger, G.J. (eds) Proceedings 30th ICALP, Lecture Notes in Computer Science, vol. 2719, pp 1–21. Springer, Heidelberg Google Scholar
  4. 4.
    Bergstra J.A. and Klop J.W. (1984). Process algebra for synchronous communication. Inform. Control 60(1/3): 109–137 MATHCrossRefMathSciNetGoogle Scholar
  5. 5.
    Bergstra J.A. and Loots M.E. (2000). Program algebra for component code. Form. Asp. Comput. 12(1): 1–17 MATHCrossRefGoogle Scholar
  6. 6.
    Bergstra J.A. and Loots M.E. (2002). Program algebra for sequential code. J. Logic Algebr. Program. 51(2): 125–156 MATHCrossRefMathSciNetGoogle Scholar
  7. 7.
    Bergstra, J.A., Middelburg, C.A.: Thread algebra for strategic interleaving. To appear in Form. Asp. Comput. Preliminary version: Computer Science Report 04-35, Department of Mathematics and Computer Science, Eindhoven University of Technology (2004)Google Scholar
  8. 8.
    Bergstra, J.A., Middelburg, C.A.: Maurer computers with single-thread control. To appear in Fundam. Inform. Preliminary version: Computer Science Report 05-17, Department of Mathematics and Computer Science, Eindhoven University of Technology (2005)Google Scholar
  9. 9.
    Bergstra, J.A., Middelburg, C.A.: Simulating turing machines on Maurer machines. To appear in J. Appl. Logic. Preliminary version: Computer Science Report 05-28, Department of Mathematics and Computer Science, Eindhoven University of Technology (2005)Google Scholar
  10. 10.
    Bergstra, J.A., Middelburg, C.A.: Maurer computers for pipelined instruction processing. To appear in Math. Struct. Comput. Sci. Preliminary version: Computer Science Report 06-12, Department of Mathematics and Computer Science, Eindhoven University of Technology (2006)Google Scholar
  11. 11.
    Bergstra J.A. and Middelburg C.A. (2006). Thread algebra with multi-level strategies. Fundam. Inform. 71(2/3): 153–182 MATHMathSciNetGoogle Scholar
  12. 12.
    Bergstra, J.A., Middelburg, C.A.: A thread calculus with molecular dynamics. Computer Science Report 06-24, Department of Mathematics and Computer Science, Eindhoven University of Technology (2006)Google Scholar
  13. 13.
    Bergstra, J.A., Middelburg, C.A.: Distributed strategic interleaving with load balancing. To appear in Future Generation Computer Systems. Preliminary version: Computer Science Report 07-03, Department of Mathematics and Computer Science, Eindhoven University of Technology (2007)Google Scholar
  14. 14.
    Bergstra J.A. and Middelburg C.A. (2007). A thread algebra with multi-level strategic interleaving. Theory Comput. Syst. 41(1): 3–32 MATHCrossRefMathSciNetGoogle Scholar
  15. 15.
    Bergstra J.A. and Ponse A. (2002). Combining programs and state machines. J. Logic Algebr. Program. 51(2): 175–192 MATHCrossRefMathSciNetGoogle Scholar
  16. 16.
    Bolychevsky A., Jesshope C.R. and Muchnick V. (1996). Dynamic scheduling in RISC architectures. IEE Proc. Comput. Digit. Tech. 143(5): 309–317 CrossRefGoogle Scholar
  17. 17.
    Croom F.H. (1989). Principles of Topology. Saunders College Publishing, Philadelphia Google Scholar
  18. 18.
    Dugundji J. (1966). Topology. Allyn and Bacon, Boston MATHGoogle Scholar
  19. 19.
    Hodges W.A. (1993). Model Theory, Encyclopedia of Mathematics and Its Applications, vol. 42. Cambridge University Press, Cambridge Google Scholar
  20. 20.
    Hopcroft J.E., Motwani R. and Ullman J.D. (2001). Introduction to Automata Theory, Languages and Computation, Second edition. Addison-Wesley, Reading, MA MATHGoogle Scholar
  21. 21.
    Jesshope, C.R., Luo, B.: Micro-threading: a new approach to future RISC. In: ACAC 2000, pp. 34–41. IEEE Computer Society Press (2000)Google Scholar
  22. 22.
    Kranakis E. (1987). Fixed point equations with parameters in the projective model. Inform. Comput. 75(3): 264–288 MATHCrossRefMathSciNetGoogle Scholar
  23. 23.
    Maurer W.D. (1966). A theory of computer instructions. J. ACM 13(2): 226–235 MATHCrossRefGoogle Scholar
  24. 24.
    Maurer W.D. (2006). A theory of computer instructions. Sci. Comput. Program. 60: 244–273 MATHCrossRefMathSciNetGoogle Scholar
  25. 25.
    Mousavi M.R., Gabbay M.J. and Reniers M.A. (2005). SOS for higher order processes. In: Abadi M., de Alfaro L. (eds) CONCUR 2005, Lecture Notes in Computer Science, vol. 3653, pp 308–322. Springer, Heidelberg Google Scholar
  26. 26.
    Mousavi M.R., Reniers M.A. and Groote J.F. (2005). Notions of bisimulation and congruence formats for SOS with data. Inform. Comput. 200: 107–147 MATHCrossRefMathSciNetGoogle Scholar
  27. 27.
    Schmidt D.A. (1986). Denotational Semantics: A Methodology for Language Development. Allyn and Bacon, Boston Google Scholar
  28. 28.
    Stoltenberg-Hansen V. and Tucker J.V. (1991). Algebraic and fixed point equations over inverse limits of algebras. Theor. Comput. Sci. 87: 1–24 MATHCrossRefMathSciNetGoogle Scholar
  29. 29.
    Ungerer T., Robič B. and Šilc J. (2003). A survey of processors with explicit multithreading. ACM Comput. Surv. 35(1): 29–63 CrossRefGoogle Scholar
  30. 30.
    Vu, T.D.: Metric denotational semantics for BPPA. Report PRG0503, Programming Research Group, University of Amsterdam (2005)Google Scholar

Copyright information

© Springer-Verlag 2007

Authors and Affiliations

  1. 1.Programming Research GroupUniversity of AmsterdamAmsterdamThe Netherlands
  2. 2.Department of PhilosophyUtrecht UniversityUtrechtThe Netherlands

Personalised recommendations