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Electrical Engineering

, Volume 101, Issue 3, pp 1053–1058 | Cite as

Organic substrate high-voltage performance: plausible capacitive isolation technology in integrated circuit package bill of materials

  • Enis TuncerEmail author
  • Mohan Gupta
  • Daryl Heussner
  • Shawn O’Connor
  • Thu Tran
Original Paper
  • 36 Downloads

Abstract

Isolation is required in electronic circuits to create zones for various voltage levels, where only low-voltage signals are allowed to communicate between zones. Application of such devices in circuits has challenges related to the anticipated working conditions at high voltages and its effect on design through employed materials, which need to provide the voltage isolation with good margin during the lifetime of the device. One of the technologies is provided with a capacitor-based isolators, which employ front- or back-end-of-the-line wafer-level dielectrics. Here, we propose a semiconductor packaging solution using a material, where a laminate buildup is characterized for high-voltage performance. The dielectric breakdown scaling for the material is reported for design considerations.

Keywords

Printed circuit board Capacitive isolation Ramp-to-breakdown High-voltage design Area scaling 

Notes

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Copyright information

© Springer-Verlag GmbH Germany, part of Springer Nature 2019

Authors and Affiliations

  1. 1.Semiconductor Packaging, Technology & Manufacturing GroupTexas Instrument IncorporatedDallasUSA

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