HIL simulation of the DTC for a three-level inverter fed a PMSM with neutral-point balancing control based on FPGA

  • Omar Sandre-Hernandez
  • Jose Rangel-Magdaleno
  • Roberto Morales-Caporal
  • E. Bonilla-Huerta
Original Paper
First Online:
Received:
Accepted:
  • 157 Downloads

Abstract

This paper presents a hardware description methodology for the direct torque control (DTC) of a three-level voltage source inverter (VSI) fed a permanent magnet synchronous motor drive with neutral-point balancing control algorithm based on field programmable gate array (FPGA). The main drawback of the conventional DTC during its digital implementation is the high torque ripple, and to overcome this problem, the use of a three-level VSI and a simple hardware description methodology for DTC based on FPGA is proposed. However, the circuit limitations of the three-level inverter, such as neutral-point balance, should be taken into account in the selection of the future space vector applied to the machine; for this reason, a simple and effective procedure to maintain the neutral-point balance is presented. The proposed methodology has been validated using hardware in the loop simulation, and results under different operating points are presented.

Keywords

Direct torque control Field programmable gate arrays PMSM Three-level VSI Hardware in the loop 
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Notes

Acknowledgements

The authors gratefully thank to the National Council of Science and Technology (CONACYT), Mexico, for the doctoral scholarship given to the first author of this paper, No. 250561, and for the support of the Project No. 234504, under the national call for short stays.

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Copyright information

© Springer-Verlag GmbH Germany 2017

Authors and Affiliations

  1. 1.National Institute for Astrophysics, Optics and ElectronicsPueblaMexico
  2. 2.Instituto Tecnologico de ApizacoTlaxcalaMexico

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