Circuits, Systems, and Signal Processing

, Volume 38, Issue 12, pp 5426–5447 | Cite as

A 99.8% Energy-Reduced Two-Stage Mixed Switching Scheme for SAR ADC Without Reset Energy

  • Yushi Chen
  • Yiqi Zhuang
  • Hualian TangEmail author


An ultra-low power consumption two-stage mixed switching scheme for successive approximation register (SAR) analog-to-digital converter (ADC) is presented. Using two simple switches, the novel switching scheme divides the capacitor arrays into two sub-arrays: stage-one and stage-two arrays. The two sub-arrays convert high and low bits cycles, respectively. Once the high bits conversion cycles are completed, the corresponding sub-arrays are split off from the capacitor arrays. This decreases the number of capacitors used in the rest conversion procedure. Thus, the proposed method improves the energy efficiency of SAR ADC. Thanks to C–2C dummy capacitors and two-stage capacitor arrays, the novel architecture achieves 86% reduction in capacitor area than conventional SAR ADC. Furthermore, based on the charge sharing technique and monotonic switching method, the proposed switching scheme does not consume reset energy and achieves 99.8% less switching energy than the conventional switching method. In addition, the proposed scheme is less sensitive to capacitor mismatch because of its great performance in linearity.


SAR ADC Ultra-low power consumption Two stage Charge sharing C–2C dummy capacitor Switching scheme 



This work is supported by the National Natural Science Foundation of China (No. 61306033) and the Science and Technology on Low-Light-Level Night Vision Laboratory (No. 61424120503162412005).


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© Springer Science+Business Media, LLC, part of Springer Nature 2019

Authors and Affiliations

  1. 1.School of MicroelectronicsXidian UniversityXi’anPeople’s Republic of China

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