Advertisement

Circuits, Systems, and Signal Processing

, Volume 38, Issue 4, pp 1413–1431 | Cite as

Performance Analysis of Lossy Coupled Non-uniform On-Chip Interconnects with Skin Effects

  • V. SulochanaEmail author
  • Sunil Agrawal
  • Balwinder Singh
Article
  • 49 Downloads

Abstract

This paper presents an accurate numerical model to evaluate the propagation delay and crosstalk noise of high-speed on-chip interconnects. The structure of on-chip interconnect is considered as non-uniform, including the skin effects. The lossy coupled non-uniform interconnects are modelled by finite-difference time-domain technique. For accurate performance analysis, nonlinear complementary metal–oxide–semiconductor is used to drive the interconnect lines. The nonlinear effects are also incorporated in the proposed model using the improved alpha power law model. The propagation delay and peak noise voltage on the victim line in dynamic and functional switching conditions are analysed and validated with Hailey simulation program with integrated circuit (HSPICE) simulations. The proposed model accuracy and computational efficiency are compared with HSPICE simulations for different cases. The comparison results show that the average error is less than 0.6% while estimating the peak noise voltage using HSPICE. Moreover, the proposed model shows a 75.2% reduction in average CPU runtime compared with HSPICE simulations. Therefore, the proposed model is fast and accurate in predicting the crosstalk-induced performance analysis of lossy coupled non-uniform interconnects at high frequencies.

Keywords

Skin effect Finite-difference time-domain (FDTD) Non-uniform on-chip interconnects Crosstalk Complementary metal–oxide–semiconductor (CMOS) 

References

  1. 1.
    R. Achar, S. Nakhla, Simulation of high-speed interconnects. Proc. IEEE 89(5), 693–728 (2001)CrossRefzbMATHGoogle Scholar
  2. 2.
    K. Agarwal, D. Sylvester, D. Blaauw, Modeling and analysis of crosstalk noise in coupled RLC interconnects. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(5), 892–901 (2006)CrossRefGoogle Scholar
  3. 3.
    A. Chatzigeorgiou, S. Nikolaidis, I. Tsoukalas, Modeling CMOS gates driving RC interconnect loads. IEEE Trans. Circuits Syst. II Analog Digit. Signal Process. 48(4), 413–418 (2001)CrossRefGoogle Scholar
  4. 4.
    A.K. Goel, High Speed VLSI Interconnections, 2nd edn. (Wiley, Hoboken, 2007)CrossRefGoogle Scholar
  5. 5.
    S.H. Hall, G.W. Hall, J.A. McCall, High-Speed Digital System Design—A Handbook of Interconnect Theory and Design Practices (Wiley, Hoboken, 2000), pp. 70–93Google Scholar
  6. 6.
    M. Hayati, A. Lotfi, Compact low pass filter with high and wide rejection in stop band using front coupled tapered CMRC. Electron. Lett. 46(12), 846–848 (2010)CrossRefGoogle Scholar
  7. 7.
    Y.T. Huang, B.C. Dian, W.J. Chappell, Spectral signature decay analysis and new tapered coaxial transmission line spectrometer design. IEEE Trans. Microw. Theory Tech. 61(12), 4630–4635 (2013)CrossRefGoogle Scholar
  8. 8.
    M. Kavicharan, N.S. Murthy, N. Bheema Rao, A. Prathima, Modeling and analysis of on-chip single and H-tree distributed RLC interconnects. Circuits Syst. Signal Process. 35(9), 3049–3065 (2016)MathSciNetCrossRefGoogle Scholar
  9. 9.
    V.R. Kumar, B.K. Kaushik, A. Patnaik, An accurate FDTD model for crosstalk analysis of CMOS-gate-driven coupled RLC interconnects. IEEE Trans. Electromagn. Compat. 56(5), 1185–1193 (2014)CrossRefGoogle Scholar
  10. 10.
    V.R. Kumar, B.K. Kaushik, A. Patnaik, An accurate model for dynamic crosstalk analysis of CMOS gate driven on-chip interconnects using FDTD method. Microelectron. J. 45(4), 441–448 (2014)CrossRefGoogle Scholar
  11. 11.
    V.R. Kumar, B.K. Kaushik, A. Patnaik, Dynamic crosstalk analysis of CMOS driven RLC interconnects using FDTD method, in USNC-URSI Radio Science Meeting (Joint with AP-S Symposium), Lake Buena Vista, FL, USA, vol. 80 (2013)Google Scholar
  12. 12.
    V.R. Kumar, B.K. Kaushik, A. Patnaik, An unconditionally stable FDTD model for crosstalk analysis of VLSI interconnects. IEEE Trans. Compon. Packag. Manuf. Technol. 5(12), 1810–1817 (2015)CrossRefGoogle Scholar
  13. 13.
    X. Li, J. Mao, M. Swaminathan, Transient analysis of CMOS-gate driven RLGC interconnects based on FDTD. IEEE Trans. CAD Integr. Circuits Syst. 30(4), 574–583 (2011)CrossRefGoogle Scholar
  14. 14.
    S. Mittal, B.K. Kaushik, K.L. Yadav, D.K. Sharma, M.K. Majumder, Crosstalk effect in coupled interconnect lines using FDTD method, in International Conference on Communications, Devices and Intelligent Systems (CODIS), Kolkata, India, pp. 365–368 (2012)Google Scholar
  15. 15.
    N. Nahman, D. Holt, Transient analysis of coaxial cables using the skin effect approximation A + Bsqrt{s}. IEEE Trans. Circuit Theory 19(5), 443–451 (1972)CrossRefGoogle Scholar
  16. 16.
    C.R. Paul, Incorporation of terminal constraints in the FDTD analysis of transmission lines. IEEE Trans. Electromagn. Compat. 36(2), 85–91 (1994)CrossRefGoogle Scholar
  17. 17.
    J. Rabaey, A. Chandrakasan, B. Nikolic, Digital Integrated Circuits: A Design Perspective, 2nd edn. (Prentice-Hall, Englewood Cliffs, 2003)Google Scholar
  18. 18.
    J.A. Roden, C.R. Paul, W.T. Smith, D. Gednery, Finite-difference, time-domain analysis of lossy transmission lines. IEEE Trans. Electromag. Compat. 38(1), 15–24 (1996)CrossRefGoogle Scholar
  19. 19.
    T. Sakurai, A.R. Newton, Alpha-power law MOSFET model and its applications to CMOS inverter delay and other formulas. IEEE J. Solid State Circuits 25(2), 584–594 (1990)CrossRefGoogle Scholar
  20. 20.
    V. Sulochana, B. Singh, S. Agrawal, Source code of the proposed model. https://db.tt/AJw6LpZnk7. Accessed 19 Apr 2018
  21. 21.
    K.T. Tang, E.G. Friedman, Transient analysis of a CMOS inverter driving resistive interconnect, in 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings, vol. 4, pp. 269–272 (2000)Google Scholar
  22. 22.
    K. Watanabe, T. Sekine, Y. Takahashi, A FDTD method for nonuniform transmission line analysis using Yee’s-lattice and wavelet expansion, in IEEE MTT-S International Microwave Workshop Series on Signal Integrity and High-Speed Interconnects, Guadalajara, pp. 83–86 (2009)Google Scholar
  23. 23.
    J.G. Yook, N.I. Dib, L.P.B. Ratehi, Characterization of high frequency interconnects using finite difference time domain and finite element methods. IEEE Trans. Microw. Theory Tech. 42(9), 1727–1736 (1994)CrossRefGoogle Scholar

Copyright information

© Springer Science+Business Media, LLC, part of Springer Nature 2018

Authors and Affiliations

  1. 1.ACS DivisionCentre for Development of Advanced ComputingMohaliIndia
  2. 2.Department of ECE, University Institute of Engineering and TechnologyPanjab UniversityChandigarhIndia

Personalised recommendations