On the X-Y convex hull of a set of X-Y polygons
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We study the class of rectilinear polygons, calledX – Y polygons, with horizontal and vertical edges, which are frequently used as building blocks for very large-scale integrated (VLSI) circuit layout and wiring. In the paper we introduce the notion of convexity within the class ofX – Y polygons and present efficient algorithms for computing theX – Y convex hulls of anX – Y polygon and of a set ofX – Y polygons under various conditions. Unlike convex hulls in the Euclidean plane, theX – Y convex hull of a set ofX – Y polygons may not exist. The condition under which theX – Y convex hull exists is given and an algorithm for testing if the given set ofX – Y polygons satisfies the condition is also presented.
KeywordsAnalysis of algorithms convexity rectilinear polygons
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- 1.L. Ferrari, P. V. Sonka and J. Slansky,Minimal rectangular partitions of digitized blobs, Proc. 5th Int'l Conf. on Pattern Recognition, Vol. 2, Miami Beach (1980) 1040–1043.Google Scholar
- 2.M. Y. Hsueh,Symbolic layout and compaction of integrated circuits, ERL Memo, NO.UCB/ERL M79/80, Univ. of Calif. Berkeley (Dec. 1979).Google Scholar
- 3.D. E. Knuth, The Art of Computer Programming, Vol. 1,Fundamental Algorithms, Addison-Wesley Reading Mass. (1968)Google Scholar
- 4.H. T. Kung, F. Luccio and Preparata, F. P.,On finding the maxima of a set of vectors, J. ACM, 22 (Oct. 1975), 469–476.Google Scholar
- 5.D. T. Lee,Onfinding the convex hull of a simple polygon, Northwestern University Technical Report 80-03-FC-01 (1980); Also to appear in Int'l J. Comput. Infor. Sci.Google Scholar
- 6.S. Sastry and A. Parker,The complexity of two-dimensional compaction of VLSI layouts, IEEE Int'l Conf. on Circuits and Computers, New York (1982).Google Scholar
- 7.M. Schlag, F. Luccio, P. Maestrini, D. T. Lee and C. K. Wong,A visibility problem in VLSI layout compaction, IBM Res. Rep. RC 9896 (1982).Google Scholar
- 8.J. Slansky,Measuring concavity on a rectangular mosaic, IEEE Trans. on Computers, Vol. TC-21, No. 12 (Dec. 1972), 1355–1364.Google Scholar
- 9.Y. Z. Liao and C. K. Wong,An algorithm to compact a VLSI symbolic layout with mixed constraints, IEEE Trans. on CAD/ICS, Vol. CAD-2, No. 2 (April 1983), 62–69.Google Scholar
- 10.M. Schlag, Y. Z. Liao and C. K. Wong,An algorithm for optimal two-dimensional compaction of VLSI layouts, Integration (to appear, 1983).Google Scholar