The Use of SI-Algebra in the design of sequencer circuits
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One approach to the design of VLSI systems involves the use of asynchronous circuits that communicate by handshaking with each other. The control circuitry generated when following this approach often includes large trees of binary sequencer components. This paper demonstrates that there is scope here for optimization (in order to improve size, speed and energy consumption). Indeed, an industrial-strength silicon compiler has now been modified to take advantage of this fact.
The problem that is addressed concerns the design of efficient control circuits that sequenceN four-phase handshakes (N > 2). Muller's speed-independent discipline facilitates the design of such circuits. SI-Algebra, a calculus that supports that discipline, is used to specify the problem and to verify (using recursion-induction) various implementations. Simple counting arguments at the gate level establish that optimization using these implementations is worthwhile.
KeywordsAsynchronous circuits Four-phase handshake Speed-independent Formal methods Process algebra
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- [Bai93]Bailey, A. M.: Automatic verification of speed-independent systems using the CIRCAL system. LNCS 683, pp. 167–178, 1993.Google Scholar
- [BaJ95]Bailey, A. M. and Josephs, M. B.: Sequencer circuits for VLSI programming. In: Proceedings of the Second Working Conference on Asynchronous Design Methodologies, IEEE Computer Society Press, pp. 82–90, 1995.Google Scholar
- [BuJ96]Bush, M. E. and Josephs, M. B.: Some Limitations to Speed-Independence in Asynchronous Circuits. In: Proceedings of the Second International Symposium on Advanced Research in Asynchronous Circuits and Systems, IEEE Computer Society Press, pp. 104–111, 1996.Google Scholar
- [Dil89]Dill, D. L.: Trace Theory for Automatic Hierarchical Verification of Speed-Independent Circuits. MIT Press, 1989.Google Scholar
- [Hoa85]Hoare, C. A. R.: Communicating Sequential Processes. Prentice-Hall, 1985.Google Scholar
- [Jos92]Josephs, M. B.: Receptive process theory. Acta Informatica 29, 17–31 (1992).Google Scholar
- [KKT93]Kishinevsky, M., Kondratyev, A., Taubin, A. and Varshavsky, V.: Concurrent Hardware: the theory and practice of self-timed design. Wiley, 1993.Google Scholar
- [Mar90]Martin, A. J.: Programming in VLSI: from communicating processes to delay-insensitive circuits. In: C.A.R. Hoare (ed.) Developments in Concurrency and Communication. Addison-Wesley, pp. 1–64, 1990.Google Scholar
- [Mil65]Miller, R. E.: Switching Theory. Vol. 2, Wiley, 1965.Google Scholar
- [Sei80]Seitz, C. L.: Chapter 7: System timing. In: C. Mead, L. Conway. Introduction to VLSI Systems. Addison-Wesley, pp. 218–262, 1980.Google Scholar
- [SuS91]Sutherland, I. E. and Sproull, R. F.: Logical Effort: Designing for Speed on the Back of an Envelope. In: C.H. Sequin (ed.) Advanced Research in VLSI, MIT Press, pp. 1–16, 1991.Google Scholar
- [vBe92]vanBerkel, K.: Beware the isochronic fork. INTEGRATION, the VLSI journal 13:103–128 (1992).Google Scholar
- [vBe93]van Berkel, K.: Handshake Circuits: An Asynchronous Architecture for VLSI Programming. Cambridge University Press, 1993.Google Scholar
- [vBB94]vanBerkel, K., Burgess, R., Kessels, J., Peeters, A., Roncken, M. and Schalij, F.: Asynchronous circuits for low power: A DCC error corrector. IEEE Design & Test of Computers, 11(2):22–32, 1994.Google Scholar
- [Var90]Varshavsky, V. I. (ed.): Self-Timed Control of Concurrent Processes. Kluwer Academic Publishers, 1990.Google Scholar