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Constructing hardware-software systems from a single description

Abstract

The study of computing is split at an early stage between the separate branches that deal with hardware and software; there is also a corresponding split in later professional specialisation. This paper explores the essential unity of the two branches and attempts to point to a common framework within which hardware-software codesigns can be expressed as a single executable specification, reasoned about, and transformed into implementations. We also describe a hardware/software co-design environment which has been built, and we show how designs can be realised within this environment. A rapid development cycle is achieved by using FPGAs to host the hardware components of the system. The achitecture of a hardware platform for supporting experimental hardware/software co-designs is presented. A particular example of a real-time processing application built using this design environment is also described.

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References

  1. 1.

    C.A.R. Hoare,Communicating, Sequential Processes, International Series in Computer Science, Prentice-Hall, 1985.

  2. 2.

    Inmos,The occam2Programming Manual, Prentice-Hall International, 1988.

  3. 3.

    Erik Brunvard,Translating Concurrent Communicating Prograns into Asynchronous Circuits, Ph.D. dissertation, School of computer Science, Carnegie Mellon University, September 1991.

  4. 4.

    F. Hanna, M. Longley, and N. Daeche, “Formal synthesis of digital systems,”Formal VLSI Specification and Synthesis, L. Claesen (ed.), No. I in VLSI Design Methods, Elsevier-Science, pp. 153–169, 1990.

  5. 5.

    Patrice Bertin, Didier Roncin, and Jean Vuillemin, “Introduction to programmable active memories,” Technical report, DEC Paris Research Laboratory, June 1989.

  6. 6.

    Gerard Berry, “A hardware implementation of pure estere,” Technical report, DEC Paris Research Laboratory, July 1991.

  7. 7.

    Peter Barrie, Paul Cockshot, George Milne, and Paul Shaw, “Design and verification of a highly concurrent machine,”Microprocessors and Microsystems, Vol. 16, No. 3, pp. 115–124, 1992.

  8. 8.

    Paul Cockshot, Paul Shaw, Peter Barrie, and George Milne, “A scalable cellular array computer,” University of Strathclyde, Draft Report, December 1991.

  9. 9.

    David Lewis, Mark van Ierssel, and Daniel Wong, “A field programmable accelerator for compiled-code applications,” Department of Electrical Engineering 1991, University of Toronto, 1993.

  10. 10.

    Sam Weber, Bard Bloom, and Geoffrey Brown, “Compiling joy to silicon,” Cornell University, 1991, submitted to POPL'91.

  11. 11.

    Kees van Berkel, Joep Kesels, Marly Roncken, Ronald Saeijs, and Frits Schalij, “The VLSI-programming language Tangram and its translation into handshake circuits,” Philips Research Laboratories, Eindhoven, 1991, submitted to EDAC 91.

  12. 12.

    David May and Catherine Keane, “Compiling occam into silicon,”Communicating Process Architecture, Prentice Hall and Inmos, 1988.

  13. 13.

    A. Wenban, J. O'Leary, and G.M. Brown, “Codesign of communication protocols,”IEEE Computer, Vol. 26, No. 12, pp. 46–52, December 1993.

  14. 14.

    Wayne Luk, Teddy Wu, and Ian Page, “Hardware-software codesign of multidimensional algorithms,”FPGAs for Custom Computing Machines, IEEE 1994.

  15. 15.

    Wayne Luk and Teddy Wu, “Towards a declarative framework for hardware-software codesign”,Proc. Third International Workshop on Hardware/Software Codesign, IEEE Computer Society Press, pp. 181–188, 1994.

  16. 16.

    A.W. Roscoe and C.A.R. Hoare, “Laws of occam programming,”Theoretical Computer Science, Vol. 60, pp. 177–229, 1988.

  17. 17.

    Michael Spivey and Ian Page, “How to program in handel,” Technical report, http://www.comlab.ox.ac.uk/oucl/hwcomp.html, Oxford University Computing Laboratory, 1993.

  18. 18.

    Laurence Paulson,ML for the Working Programmer, CUP, 1991.

  19. 19.

    G. Brown, W. Luk, and J. O'Leary, “Retargeting a hardware compiler proof using protocol converters,”Formal Aspects of Computing (to appear).

  20. 20.

    J.P. Bowen and He Jifeng, “Programs to hardware,”Tutorial Material, Formal Methods Europe'93, Industrial-Strenghth Format Methods, P.G. Larsen (ed.), pp. 437–450, 1993. A.P. Ravn (ed.),Provably Correct Systems (ProCoS) tutorial.

  21. 21.

    Jifeng He, Ian Page, and Jonathan Bowen, “Towards a provably correct hardware implementation of Occam,” G.J. Milne and L. Pierre (eds.),Correct Hardware Design and Verification Methods, Proc. IFIP WG10.2 Advanced Research Working Conference, CHARME'93, Vol. 683 ofLecture notes in Computer Science, Springer-Verlag, pp. 214–225, 1993.

  22. 22.

    Jonathan Bowen, Jifeng He, and Ian Page, “Hardware compilation,” J.P. Bowen (ed.),Towards Verified Systems, Real-time Safety-Critical Systems, Chapter, 10, Elsevier, pp. 193–207, 1994.

  23. 23.

    Ian Page, “Automatic design and implementation of microprocessors,”Proceedings of WoTUG-17, Amsterdam, pp. 190–204, April 1994. IOS Press, ISBN 90-5199-1630.

  24. 24.

    Wayne Luk, David Ferguson, and Ian Page, “Structured hardware compilation of parallel programs,” Will Moore and Wayne Luk (ed.),More FPGAs, Abingdon EE&CS books, 1994.

  25. 25.

    C.A.R. Hoare and Ian Page, “Hardware and software: The closing gap,”Transputer Communications, Vol. 2, No. 2, pp. 69–90, June 1994.

  26. 26.

    C.A.R. Hoare, “Refinement algebra proves correctness of compiling specifications,”3rd Refinement Workshop, C.C. Morgan and J.C.P. Woodcock (eds.), Workshops in Computer Science, Springer-Verlag, pp. 33–48, 1991.

  27. 27.

    C.A.R. Hoare and He Jifeng, “Refinement algebra proves correctness of a compiler,”Programming and Mathematical Method, International Summer School directed by F.L. Bauer, M. Broy, E. W. Dijkstra, C.A.R. Hoare, M. Broy (eds.), Vol. 88 of NATO ASI Series F: Computer and Systems Sciences, Springer-Verlag, pp. 245–269, 1992.

  28. 28.

    J.P. Bowen, He Jifeng, and P.K. Pandya, “An approach to verifiable compiling specification and prototyping,”Programming Language Implementation and Logic Programming (PLILP'90), P. Deransart and J. Maluszyński (eds.), Vol. 456 ofLecture Notes in Computer Science, Springer-Verlag, pp. 45–59, 1990.

  29. 29.

    Adrian Lawrence, Andrew Kay, Wayne Luk, Toshio Nomura, and Ian Page, “Using recofigurable hardware to speed up product development and performance,” W. Luk and W. Moore (eds.),FLP95, Lecture Notes in Computer Science, Springer Verlag, 1995.

  30. 30.

    Sundance Multiprocessor Technology Ltd., 4 Market Square, Amersham, Bucks, HP7 ODQ, U.K.,Product Overview, 1995.

  31. 31.

    Xilinx, San Jose, CA 95124,The Programmable Gate Array Data Book, 1993.

  32. 32.

    Inmos,The Transputer Development and iq Systems Databook, Inmos Ltd., 1991.

  33. 33.

    Matthew Bowen, “Video motion tracking,” Undergraduate project report, see http://www.comlab.ox.ac.uk/oucl/hwcomp.html, Oxford University Computing Laboratory, 1994.

  34. 34.

    Ian Page and Wayne Luk, “Compiling occam into FPGAs,”FPGAs, Will Moore and Wayne Luk (eds.), Abingdon EE&CS books, pp. 271–283, 1991.

  35. 35.

    Ian Page, Wayne Luk, and Henry Lau, “Hardware compilation for FPGAs: Imperative and declarative approaches for a robotics interface,”Proc. IEE Colloquium on Field-Programmable Gate Arrays—Technology and Applications, Ref. 1993/037, IEE, pp. 9.1–9.4, 1993.

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Page, I. Constructing hardware-software systems from a single description. J VLSI Sign Process Syst Sign Image Video Technol 12, 87–107 (1996). https://doi.org/10.1007/BF00936948

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Keywords

  • Clock Cycle
  • Hardware Implementation
  • Control Circuit
  • Communicate Sequential Process
  • Machine Code