Advertisement

Calculus of space-optimal mappings of systolic algorithms on processor arrays

  • Philippe Clauss
  • Catherine Mongenet
  • Guy-rené Perrin
Article

Abstract

We present a method to find mappings of systolic algorithms that use the minimal number of processors. This method is based on geometrical interpretations on the convex polyhedra in Zn. We use our results to derive two space-optimal mappings for the Gaussian elimination algorithm.

Keywords

Systolic Array Convex Polyhedron Processor Array Temporal Plane Control Stream 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    H.T. Kung, “Why Systolic Architectures?”Computer, vol. 15-1, 1982, pp. 37–46.CrossRefGoogle Scholar
  2. 2.
    S.Y. Kung, S.C. Lo and P.S. Lewis, “Optimal Systolic Design for the Transitive Closure and the Shortest Path Problems”,IEEE Transactions on Computers, vol. C 36, 1987, pp. 603–614.CrossRefGoogle Scholar
  3. 3.
    Y. Robert, “Systolic Algorithms and Architectures”, in (F. Folgelman-Soulie et al., eds),Automata Networks in Computer Science, Manchester: Manchester University Press, 1987, pp. 187–228.Google Scholar
  4. 4.
    P. Clauss and G.R. Perrin,Synthesis of Process Arrays, Conpar '88, Manchester, September 1988, Cambridge: Cambridge University Press.Google Scholar
  5. 5.
    J.A.B. Fortes and K.S. Fu, “Systemic Approaches to the Design of Algorithmically Specified Systolic Arrays”,Proc. ICASSP 1985, pp. 8.9.1–4.Google Scholar
  6. 6.
    C.H. Huang and C. Lengauer, “An Implemented Method for Incremental Design”, Conf. PARLE, Eindhoven, LNCS 259, 1987, pp. 160–177.Google Scholar
  7. 7.
    C. Mongenet, “Une Méthode de Conception d'Algorithmes Systoliques, Résultats Théoriques et Réalisation”, Thesis, University of Nancy, 1985.Google Scholar
  8. 8.
    D.I. Moldovan, “Advis, a Software Package for the Design of Systolic Arrays”,Proceedings 1984 IEEE ICCD: VLSI in Computers, 1984, pp. 158–164.Google Scholar
  9. 9.
    P. Quinton, “Automatic Synthesis of Systolic Arrays from Uniform Recurrent Equations”,Proc. IEEE 11th Int'l. Symp. on Computer Architecture, Ann Arbor, MI, 1984, pp. 208–214.Google Scholar
  10. 10.
    S.V. Rajopadhye and R.M. Fujimoto, “Systolic Array Synthesis by Static Analysis of Program Dependencies”, Conf. PARLE, Eindhoven, LNCS 259, 1987, pp. 295–310.Google Scholar
  11. 11.
    P. Gachet, B. Joinnault and P. Quinton, “Synthesizing Systolic Arrays Using Diastol”, In (W. Moore, A. McCabe, R. Urquhart, eds.),International Workshop on Systolic Arrays, Adam Hilger, University of Oxford, July 2–4, 1986, pp. 25–36.Google Scholar
  12. 12.
    P. Clauss, “Synthese d'Algorithmes Systoliques et Implantation Optimale en place sur Réseaux de Processeurs Synchrones”, PhD Thesis, University of Franche-Comté, May 1990.Google Scholar
  13. 13.
    P. Clauss, “Mapping Systolic Algorithms on Processor Arrays”, Research Report, Lab. Informatique Besançon, January 1989.Google Scholar
  14. 14.
    G.R. Perrin, P. Clauss and S. Damy, “Mapping Programs on Regular Distributed Architectures”,Hypercube and Distributed Computers, Amsterdam: Elsevier Science, 1989.Google Scholar
  15. 15.
    G.R. Perrin, “Parallel Solutions for Equation System”,Int'l. Workshop on Parallel and Distributed Algorithms, Bonas, Amsterdam: Elsevier Science, 1988.Google Scholar
  16. 16.
    Y. Wong and J.-M. Delosme, “Optimization of Processor Count for Systolic Arrays”, Research Report YALEU/DCS/RR-697, May 1989.Google Scholar
  17. 17.
    H.T. Kung and C.E. Leiserson, “Systolic Arrays for VLSI”, Sparse Matrix Proceedings,SIAM, 1978, pp. 245–282.Google Scholar
  18. 18.
    T. Fountain, “Processor Arrays: Architecture and Applications”,Microelectronics and Signal Processing, London: Academic Press, 1987.zbMATHGoogle Scholar
  19. 19.
    J. Hopcroft and R. Tarjan, “Efficient Planarity Testing”,JACM, vol. 21, 1974, pp. 549–568.MathSciNetCrossRefzbMATHGoogle Scholar
  20. 20.
    N. Chiba, K. Onoguchi and T. Nishizeki, “Drawing Plane Graphs Nicely”,Acta Informatica, vol. 22, 1985, pp. 187–201.MathSciNetCrossRefzbMATHGoogle Scholar

Copyright information

© Kluwer Academic Publishers 1992

Authors and Affiliations

  • Philippe Clauss
    • 1
  • Catherine Mongenet
    • 2
  • Guy-rené Perrin
    • 3
  1. 1.Laboratoire d'Informatique de BesançonUniversité de Franche-comtéBesançon CedexFrance
  2. 2.Département d'-informatiqueUniversité Louis PasteurStrasbourg cedexFrance
  3. 3.Laboratoire d'Informatique de BesançonUniversité de Franche-ComtéBesançon CedexFrance

Personalised recommendations