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Acta Informatica

, Volume 18, Issue 4, pp 335–344 | Cite as

Systolic automata for VLSI on balanced trees

  • K. CulikII
  • J. Gruska
  • A. Salomaa
Article

Summary

Systolic tree automata with a binary (or, more generally, balanced) underlying tree are investigated. The main emphasis is on input conditions, decidability, and characterization of acceptable languages.

Keywords

Information System Operating System Data Structure Communication Network Information Theory 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

  1. 1.
    Culik II, K., Salomaa, A., Wood, D.: VLSI systolic trees as acceptors. Res. Rept. CS-81-32, Dept. of Computer Science, University of Waterloo, Waterloo, Ontario, 1981Google Scholar
  2. 2.
    Culik II, K., Gruska, J., Salomaa, A.: Systolic trellis automata (for VLSI). Ibid., CS-81-34Google Scholar
  3. 3.
    Culik II, K., Gruska, J., Salomaa, A.: On a family of L languages resulting from systolic tree automata. Ibid., CS-81-36Google Scholar
  4. 4.
    Culik II, K., Gruska, J., Salomaa, A.: On nonregular context-free languages and pumping. EATCS Bulletin 16, 22–24 (1982)Google Scholar

Copyright information

© Springer-Verlag 1983

Authors and Affiliations

  • K. CulikII
    • 1
  • J. Gruska
    • 1
  • A. Salomaa
    • 1
  1. 1.Department of Computer ScienceUniversity of WaterlooWaterlooCanada

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