Advertisement

Journal of Automated Reasoning

, Volume 5, Issue 4, pp 429–460 | Cite as

Microprocessor design verification

  • Warren A. HuntJr
Article

Abstract

The verification of a microprocessor design has been accomplished using a mechanical theorem prover. This microprocessor, the FM8502, is a 32-bit general-purpose, von Neumann processor whose design-level (gate-level) specification has been verified with respect to its instruction-level specification. Both specifications were written in the Boyer—Moore logic, and the proof of correctness was carried out with the Boyer—Moore theorem prover.

Key words

Hardware verification mechanical theorem proving microprocessor verification 

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Bevier, W. R., Hunt, W. A. Jr, and Young, W. D., ‘Toward verified execution environments’, In Proceedings of the 1987 Symposium on Security and Privacy, IEEE, 1987.Google Scholar
  2. 2.
    Boyer, R. S. and Moore, J S., A Computational Logic Handbook, Academic Press, New York, 1988.Google Scholar
  3. 3.
    Cohn, A., ‘The notion of proof in hardware verification’, J. Automated Reasoning 5, 127–139 (1989).Google Scholar
  4. 4.
    Gordon, M., ‘Why higher-order logic is a good formalism for specifying and verifying hardware’, Technical Report 77, Univ. of Cambridge, Computer Laboratory, 1985.Google Scholar
  5. 5.
    Gordon, M., ‘HOL: A proof generating system for higher-order logic’, Technical Report 103, Univ. of Cambridge, Computer Laboratory, 1987.Google Scholar
  6. 6.
    Hunt, W. A. Jr, ‘FM8501: A verified microprocessor’, PhD Thesis, Univ. of Texas at Austin, December, 1985. Also available through Computational Logic, Inc., Suite 290, 1717 West Sixth Street, Austin, TX 78703.Google Scholar
  7. 7.
    Hunt, W. A. Jr, ‘The mechanical verification of a microprocessor design’, in From HDL Descriptions to Guaranteed Correct Circuit Designs (ed. D. Borrione), North Holland, pp. 89–132, 1987.Google Scholar
  8. 8.
    Joyce, Jeffrey J., ‘Formal specification and veification of asynchronous processes in higher-order logic’, Technical Report 136, Univ. of Cambridge, Computer Laboratory, 1988.Google Scholar
  9. 9.
    Gordon, M., ‘LCF-LSM’, Technical Report 41, Univ. of Cambridge, Computer Laboratory, 1981.Google Scholar

Copyright information

© Kluwer Academic Publishers 1989

Authors and Affiliations

  • Warren A. HuntJr
    • 1
  1. 1.Computational Logic, Inc.AustinU.S.A.

Personalised recommendations