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Journal of Automated Reasoning

, Volume 5, Issue 4, pp 411–428 | Cite as

An approach to systems verification

  • William R. Bevier
  • Warren A. HuntJr
  • J Strother Moore
  • William D. Young
Article

Abstract

The term systems verification refers to the specification and verification of the components of a computing system, including compilers, assemblers, operating systems and hardware. We outline our approach to systems verification, and summarize the application of this approach to several systems components. These components consist of a code generator for a simple high-level language, an assembler and linking loader, a simple operating system kernel, and a microprocessor design.

Key words

Program verification hardware verification automated theorem proving formal specification 

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Copyright information

© Kluwer Academic Publishers 1989

Authors and Affiliations

  • William R. Bevier
    • 1
  • Warren A. HuntJr
    • 1
  • J Strother Moore
    • 1
  • William D. Young
    • 1
  1. 1.Computational Logic, Inc.AustinU.S.A.

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