Design Automation for Embedded Systems

, Volume 1, Issue 4, pp 357–386

CoWare—A design environment for heterogeneous hardware/software systems

  • D. Verkest
  • K. Van Rompaey
  • I. Bolsens
  • H. De Man


This paper addresses CoWare: an environment for design of heterogeneous systems on chip. These systems are heterogeneous both in terms of specification and implementation. CoWare is based on a communicating processes data-model which supports encapsulation and refinement and makes a strict separation between functional and communication behaviour. Encapsulation enables the reuse of existing specification and design environments (languages, simulators, compilers). Refinement provides for a consistent and integrated path from specification to implementation. The design steps that will be addressed include: system specification, simulation at various abstraction levels, data path synthesis, communication refinement and hardware/software co-design. A spread-spectrum based pager system serves to illuminate the design process in the CoWare environment.


Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.


  1. 1.
    J. Buck et al., “The token flow model.” in Proceedings of the Data Flow Workshop, Hamilton Island, Australia, May 1992.Google Scholar
  2. 2.
    J. Buck et al., “PTOLEMY: A framework for simulating and prototyping heterogeneous systems.” International Journal on Computer Simulation, January 1994.Google Scholar
  3. 3.
    A. Fauth, J. Van Praet, and M. Freericks, “Describing instruction set processors using nML,” in Proceedings of the European Design and Test Conference, ED&TC 1995, Paris, France, March 1995, pp. 505–507.Google Scholar
  4. 4.
    M. Genoe, L. Claesen, E. Verlind, F. Proesmans, and H. De Man, “Illustration of the SFG-Tracing multi level behavioral verification methodology,” in Proceedings of the ICCD 91, Cambridge, MA, October 1991, pp. 338–341.Google Scholar
  5. 5.
    D. 'Harel, “A visual formalism for complex systems.” Science of Computer Programming (8), pp. 231–274, 1987.CrossRefMathSciNetMATHGoogle Scholar
  6. 6.
    P. N. Hilfinger, J. Rabaey, D. Genin, C. Scheers, and H. De Man, “DSP specification using the SILAGE language,” in Proceedings International Conference on Acoustics, Speech and Signal Processing, Albuquerque, NM, April 1990, pp. 1057–1060.Google Scholar
  7. 7.
    D. Lanneer, J. Van Praet, K. Schoofs, W. Geurts, A. Kifli, F. Thoen, and G. Goossens, “CHESS, retargetable code generation for embedded processors,” in Code Generation for Embedded Processors, P. Marwedel and G. Goossens, eds., Kluwer Academic Publishers, Boston, 1995.Google Scholar
  8. 8.
    E. A. Lee and D. G. Messerschmitt, “Synchronous data flow.” IEEE Proceedings, September 1987.Google Scholar
  9. 9.
    B. Lin and S. Vercauteren, “Synthesis of concurrent system interface modules with automatic protocol conversion generation,” in Proceedings of the IEEE International Conference on Computer-Aided Design, ICCAD 94, San José, CA, November 1994, pp. 101–108.Google Scholar
  10. 10.
    S. Narayan, F. Vahid, and D. D. Gajski, “System specification with the SpecCharts language.” IEEE Design & Test of Computers pp. 6–13, December 1992.Google Scholar
  11. 11.
    S. Note, W. Geurts, F. Catthoor, and H. De Man, “Cathedral III: Architecture driven high-level synthesis for high throughput DSP applications,” in Proceedings of the 28th ACM/IEEE Design Automation Conference, DAC 91, San Francisco, CA, June 1991, pp. 597–602.Google Scholar
  12. 12.
    L. Philips, J. Vanhoof, M. Wouters, B. Gyselinckx, I. Bolsens, and H. De Man, “A programmable spread spectrum modem for wireless communications,” in 1996 On-Chip System Design Conference, Design Supercon 96, Santa Clara, USA, Jan. 30–Feb. 1 1996, pp. 10.1–10.18.Google Scholar
  13. 13.
    J. Rabaey, C. Chu, P. Hoang, and M. Potkonjak, “Fast prototyping of datapath-intensive architectures.” IEEE Design & Test of Computers 8(6), pp. 40–51, June 1991.Google Scholar
  14. 14.
    H. Samsom, F. Franssen, F. Catthoor, and H. De Man, “Verification of loop transformations for real time signal processing applications,” in VLSI Signal Processing VII, J. Rabaey, P. Chau, and J. Eldon, eds., IEEE Press, New York, NY, 1994, pp. 208–217.Google Scholar
  15. 15.
    UNIX System Laboratories, Inc. USL C+ Language System Release 3.0 Library Manual, 1992.Google Scholar
  16. 16.
    M. Van Canneyt, “Specification, simulation and implementation of a GSM speech codec with DSP station.” DSP & Multimedia Technology 3(5), pp. 6–15, May 1994.Google Scholar
  17. 17.
    J. van Meerbergen et al., “PHIDEO: High-level synthesis of high throughput applications.” Journal of VLSI Signal Processing 9(1–2), pp. 89–104, January 1995.Google Scholar
  18. 18.
    P. Willekens et al., “Algorithm specification in DSP station using data flow language.” DSP Applications 3(1), pp. 8–16, January 1994.Google Scholar

Copyright information

© Kluwer Academic Publishers 1996

Authors and Affiliations

  • D. Verkest
    • 1
  • K. Van Rompaey
    • 1
  • I. Bolsens
    • 1
  • H. De Man
    • 2
  1. 1.IMECLeuvenBelgium
  2. 2.Katholieke UniversiteitLeuvenBelgium

Personalised recommendations