Journal of Electronic Testing

, Volume 3, Issue 2, pp 107–118 | Cite as

The Comparative and Concurrent Simulation of discrete-event experiments

  • Ernst Ulrich
  • Karen P. Lentz
  • Jack Arabian
  • Michael Gustin
  • Vishwani D. Agrawal
  • Pier Luca Montessoro
Fault Simulation


Discrete-Event Simulation is a powerful, but underexploited alternative for many kinds of physical experimentation. It permits what is physically impossible or unaffordable, to conduct and run related experiments in parallel, against each other. Comparative and Concurrent Simulation (CCS) is a parallel experimentation method that adds a comparative dimension to discrete-event simulation. As a methodology or style, CCS resembles a many-pronged rake; its effectiveness is proportional to the number of prongs—the number of parallel experiments. It yields information in parallel and in time order, rather than in the arbitrary order of one-pronged serial simulations. CCS takes advantage of the similarities between parallel experiments via the one-for-many simulation of their identical parts; if many experiments are simulated, then it is normally hundreds to thousands times faster than serial simulation. While CCS is a one-dimensional method, a more general, multi-dimensional or multidomain version is MDCCS. MDCCS permits parent experiments to interact and produce offspring experiments, i.e., to produce more, but smaller experiments, and many zero-size/zero-cost experiments. MDCCS is more general, informative, and faster (usually over 100:1) than CCS for most applications. It handles more complex applications and experiments, such as multiple faults, variant executions of a software program, animation, and others.


Discrete-event simulation parallel simulation concurrent simulation comparative simulation 


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  1. 1.
    M. A. Breuer, and A. D. Friedman, Diagnosis and reliable design of digital systems, New York: Computer Science Press, 1976.Google Scholar
  2. 2.
    A. Miczo, Digital logic testing and simulation, New York: Harper & Row, 1986.Google Scholar
  3. 3.
    N. D. Phillips, J. G. Tellier, “Efficient event manipulation—the key to large scale simulation,” Proc. International Test Conference, Cherry Hil, NJ, pp. 266–273, October 1978.Google Scholar
  4. 4.
    E. Ulrich, “Excessive simulation of activity in digital networks,” Communications of the ACM, vol. 12, pp. 102–110, February 1969.Google Scholar
  5. 5.
    E. Ulrich, “Event manipulation for discrete simulations requiring large number of events,” Communications of the ACM, vol. 21, pp. 777–785, September 1978.Google Scholar
  6. 6.
    M. Abramovici, M. A. Breuer, and K. Kumar, “Concurrent fault simulation and functional level modeling,” Proceedings, Design Automation Conference, pp. 128–135, June 1977.Google Scholar
  7. 7.
    D. B. Armstrong, “A Deductive method for simulating faults in logic circuits,” IEEE Trans. Computers, vol. C-21(5), pp. 464–471, May 1972.Google Scholar
  8. 8.
    M. A. Breuer and A. C. Parker, “Digital system simulation: Current status and future trends,” Proceedings Design Automation Conference, pp. 269–275, 1981.Google Scholar
  9. 9.
    D. Machlin, D. Gross, S. Kadkade, and E. Ulrich, “Switch-level concurrent fault simulation based on a general purpose list traversal mechanism,” Proceedings, IEEE International Test Conference, pp. 574–581, 1988.Google Scholar
  10. 10.
    E. Ulrich, T. Baker, and L. Williams, “Fault-test analysis techniques based on logic simulation,” Proc. Design Automation Conference, pp. 111–115, 1972.Google Scholar
  11. 11.
    E. Ulrich and T. Baker, “The concurrent simulation of nearly identical digital networks,” Proc. Design Automation Conference. pp. 145–150, 1973.Google Scholar
  12. 12.
    E. Ulrich, D. Lacy, N. Phillips, J. Tellier, M. Kearney, T. Elkind, and R. Beaven, “High-speed concurrent simulation with vectors and scalars,” Proc. Design Automation Conference, pp. 374–380, 1980.Google Scholar
  13. 13.
    S. Demba, E. Ulrich, K. Panetta, D. Giramma, “Experiences with concurrent fault simulation of diagnostic programs,” ITC, 1988, and IEEE Transactions on CAD. pp. 621-628, June 1990.Google Scholar
  14. 14.
    S. Gai, F. Somenzi, E. Ulrich, “Advances in concurrent multilevel simulation,” IEEE Transactions on CAD, vol. CAD-6 pp. 1006–1012, Nov. 1987.Google Scholar
  15. 15.
    S. Gai, P. L. Montessoro, F. Somenzi, “The performance of the concurrent fault simulation algorithms in MOZART,” Proceedings Design Automation Conf., pp. 692–697, 1988.Google Scholar
  16. 16.
    S. Gai, P. L. Montessoro, F. Somenzi, “MOZART: A concurrent multi-level simulator,” IEEE Transaction on CAD, vol. 7, pp. 1005–1016, Sept. 1988.Google Scholar
  17. 17.
    D. Machlin, “A General Purpose Traversal Mechanism for Concurrent Logic Simulation,” MA Thesis, Worcester Polytechnic Institute, Worcester, MA, 1987.Google Scholar
  18. 18.
    P. L. Montessoro and S. Gai, “Creator: General and efficient multilevel concurrent fault simulation,” Proceedings, Design Automation Conference, pp. 160–163, 1991.Google Scholar
  19. 19.
    E. Ulrich, “Concurrent simulation at the switch, gate and register levels,” Proc. International Test Conference, pp. 703–709, November 1985.Google Scholar
  20. 20.
    E. Ulrich, K. P. Lentz, S. Demba, and R. Razdan, “Concurrent min-max simulation,” Proceedings, 1991 European Design Automation Conference. Google Scholar
  21. 21.
    D. Giramma, Private communication.Google Scholar
  22. 22.
    R. Razdan, G. Bischoff, and E. Ulrich, “Exploitation of periodicity in logic simulation of synchronous circuits,” Proceedings, Proc. Int. Conference on Computer Aided Design, pp. 62–65, November 1990.Google Scholar
  23. 23.
    T. Weber, and F. Somenzi, “Periodic signal suppression in a concurrent fault simulator,” Proceedings, 1991 European Design Automation Conference. Google Scholar
  24. 24.
    K. Cheng and V. Agrawal, Unified methods for VLSI simulation and test generation, Boston:Kluwer Academic Publishers, 1989.Google Scholar
  25. 25.
    A. Lioy, P. L. Montessoro, S. Gai, “A complexity analysis of sequential ATPG,” Proc. International Symposium on Circuits and Systems, Portland OR, pp. 1946–1949, May 1989.Google Scholar
  26. 26.
    W. Leontief, and F. Duchin, The Future Impact of Automation on Workers. New York: Oxford University Press, 1986.Google Scholar
  27. 27.
    G. E. P. Box, W. G. Hunter, and J. Stuart Hunter, Statistics for Experimenters. New York:John Wiley and Sons, Inc., 1978.Google Scholar
  28. 28.
    G. Taguchi, and S. Konishi, Taguchi Methods, Orthogonal Arrays and Linear Graphs. American Supplier Institute, Inc. 1987.Google Scholar
  29. 29.
    R. E. Bryant, “Symbolic simulation - technique and applications,” Proceedings Design Automation Conf., pp. 517–521, June 1990.Google Scholar
  30. 30.
    R. M. Glorioso, and F. C. Colon Osorio, Engineering Intelligent Systems. Bedford, MA:Digital Science Press, 1980.Google Scholar

Copyright information

© Kluwer Academic Publishers 1992

Authors and Affiliations

  • Ernst Ulrich
    • 1
  • Karen P. Lentz
    • 1
  • Jack Arabian
    • 1
  • Michael Gustin
    • 1
  • Vishwani D. Agrawal
    • 2
  • Pier Luca Montessoro
    • 3
  1. 1.Digital Equipment CorporationMaynardUSA
  2. 2.AT&T Bell LaboratoriesMurray HillUSA
  3. 3.Politecnico di TorinoItaly

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