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Arithmetization of Register Machines with Counters

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Abstract

Register machines with counters are arithmetized in class \(\mathcal{E}^{0}\) of the Grzegorczyk hierarchy. As a sequence, we construct a new simple basis via superpositioning in Grzegorczyk class \(\mathcal{E}^{2}\).

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Authors and Affiliations

  1. Department of Computational Mathematics and Cybernetics, Moscow State University, 119991, Moscow, Russia

    I. V. Savitskii

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  1. I. V. Savitskii
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Correspondence to I. V. Savitskii.

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Translated by A. Muravnik

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Savitskii, I.V. Arithmetization of Register Machines with Counters. MoscowUniv.Comput.Math.Cybern. 44, 133–145 (2020). https://doi.org/10.3103/S0278641920030048

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  • DOI: https://doi.org/10.3103/S0278641920030048

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