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Formation of nanosized elements of microwave transistor gates by ion beam lithography

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Abstract

A technique for forming a nanosized gate of a high-power microwave transistor is proposed. The optimal exposure parameters of 950-PMMA-A2 and ELP-20 resists are established. The technological route of ion beam lithography with the use of multilayer resists is investigated. A technique for fabricating a continuous mesh of earthed alignment marks formed on the ion-sensitive resist to visualize the alignment marks on a dielectric substrate by ion microscopy is developed.

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Authors and Affiliations

  1. National Research University of Electronic Technology, Zelenograd, Moscow, 124498, Russia

    K. K. Lavrentyev, V. K. Nevolin, R. Yu. Rozanov, K. A. Tsarik & A. A. Zaitsev

Authors
  1. K. K. Lavrentyev
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  2. V. K. Nevolin
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  3. R. Yu. Rozanov
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  4. K. A. Tsarik
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  5. A. A. Zaitsev
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Corresponding author

Correspondence to V. K. Nevolin.

Additional information

Original Russian Text © K.K. Lavrentyev, V.K. Nevolin, R.Yu. Rozanov, K.A. Tsarik, A.A. Zaitsev, 2015, published in Izvestiya Vysshikh Uchebnykh Zavedenii, Elektronika, 2015, Vol. 20, No. 6, pp. 591–597.

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Lavrentyev, K.K., Nevolin, V.K., Rozanov, R.Y. et al. Formation of nanosized elements of microwave transistor gates by ion beam lithography. Russ Microelectron 45, 451–454 (2016). https://doi.org/10.1134/S1063739716070106

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  • DOI: https://doi.org/10.1134/S1063739716070106

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