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Gate driver for parallel connection SiC MOSFETs with over-current protection and dynamic current balancing scheme

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Abstract

In this paper, a SiC MOSFETs gate driver for parallel connections is proposed and implemented. The proposed design enhances the reliability of parallel-connected SiC MOSFETs in high-frequency applications. High-speed over-current protections are applied for both over-voltage and under-voltage situations. In addition, a dynamic balancing current sharing scheme for SiC MOSFETs is proposed for high-speed parallel applications by current feedback and switching delay time compensation. With the proposed design, parallel-connected SiC MOSFETs can work at an operation frequency of 1 MHz with over-current protections. In addition, with the dynamic current balancing scheme, the operation temperature decreases from 115 to 86.9 °C, while the temperature difference for paralleled devices drops from 25.8 to 1.8 °C.

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Acknowledgements

This work is supported by National Key R&D Program of China (Grant No. 2017YFB0102302).

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Authors and Affiliations

  1. School of Microelectronics, Xidian University, Xi’an, China

    Yimeng Zhang, Qingwen Song, Xiaoyan Tang & Yuming Zhang

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  1. Yimeng Zhang
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  2. Qingwen Song
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  3. Xiaoyan Tang
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  4. Yuming Zhang
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Correspondence to Yimeng Zhang.

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Zhang, Y., Song, Q., Tang, X. et al. Gate driver for parallel connection SiC MOSFETs with over-current protection and dynamic current balancing scheme. J. Power Electron. 20, 319–328 (2020). https://doi.org/10.1007/s43236-019-00026-1

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  • DOI: https://doi.org/10.1007/s43236-019-00026-1

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