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Optimization of two major interfaces in MoS2 FETs with low frequency noise analysis

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Abstract

The two interfaces in direct contact with the channel are the main factors affecting the performance of MoS2 FETs. They are the source–drain electrode contacts and the interface between the channel and the gate dielectric material. As carriers move through the channel, they may fluctuate if they encounter a non-uniform electrostatic field. Carrier fluctuations are a major cause of performance degradation in semiconductor devices and circuits, resulting from delayed turn-on in the channel and low carrier mobility. This issue is becoming increasingly pronounced as low-dimensional semiconductor materials are used or as devices are miniaturized to an extreme extent. In this study, we utilized low-temperature deposited indium electrodes and hexagonal boron nitride(h-BN) as gate dielectric materials in MoS2 devices, aiming to minimize interfacial defects. The In-MoS2/h-BN device exhibited negligible contact resistance and interfacial Coulomb scattering, and a remarkably reduced density of dielectric traps, resulting in a negative threshold voltage shift of approximately 60 V and a tenfold improvement in carrier mobility. DC and low frequency noise (LFN) measurements were used to evaluate the impact of interfacial properties of the devices. The LFN modeling demonstrated that interfacial Coulomb scattering was reduced in the low-current region for devices utilizing the indium electrodes. The LFN provided reasonable results compared with the DC analysis, and also detailed information about the behavior of carriers.

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Acknowledgements

This research was supported by the Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education (NRF2019R1A2C1010742) of Korea.

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Authors and Affiliations

  1. Department of Electrical Engineering, University of Ulsan, Ulsan, 44610, South Korea

    Hyunjin Ji

  2. Department of Energy Science, Sungkyunkwan University, Suwon, 16419, South Korea

    Dong-Hwan Choi & Byung-wook Ahn

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Ji, H., Choi, DH. & Ahn, Bw. Optimization of two major interfaces in MoS2 FETs with low frequency noise analysis. J. Korean Phys. Soc. 82, 1098–1104 (2023). https://doi.org/10.1007/s40042-023-00825-7

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