Skip to main content
SpringerLink
Log in

Field-effect BJT: an adaptive and multifunctional nanoscale transistor

  • Original Article
  • Published:
Applied Nanoscience Aims and scope Submit manuscript

Abstract

Nano-electronic integrated circuit technology is exclusively based on MOSFET transistor due to its scalability down to the nanometer range. On the other hand, bipolar junction transistor (BJT), which provides unmatched analog characteristics and frequency response, cannot be scaled to nanometer regime without the loss of transistor action. Here a versatile nanoscale transistor is introduced that provides identical BJT behavior and expands its capabilities. The new transistor uses CMOS fabrication technology and creates BJT’s emitter, base, and collector via electric fields. By allowing carrier modulation during operation, its current gain can be changed at least by several orders of magnitude. This property introduces novel adaptive, variable gain, and programmable analog modules into existing electronic circuit design and manufacturing. Regular BJT behavior in various confiurations are obtained, the common-emitter presented here indicates an ideality factor of 1.09 for forward biased emitter–base diode, a Gummel plot similar to regular BJT, and a current amplification factor that can change by 6 orfers of magnitude by varying gate voltages. A NOT gate version of this device with the critical dimension of 7 nm operates at 730 GHz, and its three-stage ring oscillator exhibits a frequency of 240 GHz. With proper gate biasing, it can also operate as a nanoscale MOSFET, easily alleviating short-channel effects.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig.6
Fig. 7
Fig. 8
Fig. 9
Fig. 10
Fig. 11
Fig. 12
Fig. 13
Fig. 14

Similar content being viewed by others

References

  • Abou Chahine M, Bazzi H, Mohsen A, Harb A, Kassem A (2018) A low-noise voltage-controlled ring oscillator in 28-nm FDSOI technology for UWB applications. AEU Int J Electr Commun 97:94–101

    Article  Google Scholar 

  • Amirmazlaghani M, Raissi F (2009) Memory cell using modified field effect diode. IEICE Electronics Exp 6:1582–1586

    Article  Google Scholar 

  • Asada S, Satoshi T, Kimoto T, Suda J (2017) Design criterion for SiC BJTs to avoid ON-characteristics degradation due to base spreading resistance. IEEE Trans Electron Dev 64:2086–2091

    Article  CAS  Google Scholar 

  • Athanasiou S, Athanasiou S, Legrand CA, Cristoloyeanu S, Galy P (2017) Novel ultrathin FD-SOI BiMOS device with reconfigurable operation. IEEE Trans Electron Dev 64:916–922

    Article  CAS  Google Scholar 

  • Azizollah-Ganji B, Gholipour M (2018) Effects of the channel length on the nanoscale field effect diode performance. J Optoelectr Nanostruct 3(2):29–40

    Google Scholar 

  • Badwan AZ, Chbili Z, Yang Y, Salman AA, Li Q, Ioannou DE (2013) SOI field-effect diode DRAM cell: design and operation. IEEE Electron Device Lett 34(8):1002–1004

    Article  CAS  Google Scholar 

  • Baidya A, Lenka TR, Baishya S (2016) Application of 3D double gate Junctionless transistor for ring oscillator. In: 2016 international conference on recent advances and innovations in engineering (ICRAIE), IEEE, p. 1–4

  • Balestra F (2017) Nanoscale CMOS. John wiley & sons, New Jersey

    Google Scholar 

  • Bardeen J, Brattain WH (1948) The transistor a semi-conductor triode. Phys Rev 74:230–231

    Article  Google Scholar 

  • Bédécarrats T, Galy P, Fenouillet-Béranger C, Cristoloveanu S (2019) Investigation of built-in bipolar junction transistor in FD-SOI BIMOS. Solid State Electron 159:177–183

    Article  CAS  Google Scholar 

  • Brattain WH, Bardeen J (1948) Nature of the forward current in germanium point contacts. Phys Rev 74:231–232

    Article  Google Scholar 

  • Brinkman WF, Haggan DE, Troutman WW (1997) A history of the invention of the transistor and where it will lead us. IEEE J Solid State Circ 32:1858–1865

    Article  Google Scholar 

  • Chakraborty S, Malik A, Sarkar CK, Rao VR (2007) CMOS devices and circuits for ultralow power analog/mixed-signal applications. IEEE Trans Electron Dev 54:241–248

    Article  Google Scholar 

  • Chan KK, Hashemi P, Ning TH, Reznicek A (2019) Lateral bipolar junction transistor with abrupt junction and compound buried oxide. US Patent Application 16/502,271, filed 24 Oct 2019

  • Chien JC, Upadhyaya P, Jung H, Chen S, Fang W, Niknejad AM, Savoj J, Chang K (2014). 2.8 A pulse-position-modulation phase-noise-reduction technique for a 2-to-16GHz injection-locked ring oscillator in 20 nm CMOS. In 2014 IEEE international solid-state circuits conference digest of technical papers (ISSCC), IEEE, p. 52–53

  • Beloni DL, Singh K, Kumar J, Srivastava A (2019) Triple-sided charged plasma symmetric lateral bipolar transistor on SiGe-OI. Semicond Sci Technol 34(5):55019

    Article  CAS  Google Scholar 

  • Dubey S, Kondekar PN (2016) Performance comparison of conventional and strained FinFET inverters. Microelectron J 55:108–115

    Article  CAS  Google Scholar 

  • Garg N, Pratap Y, Gupta M, Kabra S (2019) Impact of different localized trap charge profiles on the short channel double gate junctionless nanowire transistor based inverter and Ring Oscillator circuit. AEU Int J Electr Commun 108:251–261

    Article  Google Scholar 

  • Hashemi P, Hekmatshoartabari B, Reznicek A, Balakrishnan K, Yau JB (2019) Lateral bipolar junction transistor with dual base region. US Patent Application 15/828,152, filed 30 May 2019

  • Hu C (2010) Modern semiconductor devices for integrated circuits. Prentice Hall, New Jersey

    Google Scholar 

  • Hung C-W, Chiang M-C, Lin Y-C (2020) Bipolar junction transistor. US Patent 10,529,837, issued 7 Jan 2020

  • Jafari Toushaee B, Manavizadeh N (2015) An inverter gate design based on nanoscale S-FED as a function of reservoir thickness. IEEE Trans Electron Dev 62:3147–3152

    Article  CAS  Google Scholar 

  • Jain AK, Kumar MJ (2020) Sub-10 nm scalability of junctionless FETs using a ground plane in high-K BOX: a simulation study. IEEE Access 8:137540–137548

    Article  Google Scholar 

  • Jha A, Lima TFD, Saeidi H, Bilodeau S, Tait AN, Huang C, Abbaslou S, Shastri B, Prucnal PR (2020) Lateral bipolar junction transistor on a silicon photonics platform. Opt Express 28(8):11692–11704

    Article  CAS  Google Scholar 

  • Jung Y et al (2012) A novel BJT structure implemented using CMOS processes for high-performance analog circuit applications. IEEE Trans Semicond Manuf 25:549–554

    Article  Google Scholar 

  • Kilby J (1976) Invention of the integrated circuit. IEEE Trans Elec Dev 7:648–654

    Article  Google Scholar 

  • Leblebici Y, Kang S-M (1996) CMOS digital integrated circuits: analysis and design. McGraw-Hill, New York

    Google Scholar 

  • Lee JU, Gipp PP, Heller CM (2004) Carbon nanotube p-n junction diodes. Appl Phys Lett 85:145–147

    Article  CAS  Google Scholar 

  • Lim WL, Moon EJ, Freeland JW, Meyers DJ, Kareev M, Chakhalian J, Urazhdin S (2012) Field-effect diode based on electron-induced Mott transition in NdNiO3. Appl Phys Lett 101(14):143111

    Article  CAS  Google Scholar 

  • Liu L, Ningsheng Xu, Zhang Yu, Zhao P, Chen H, Deng S (2019) Van der Waals bipolar junction transistor using vertically stacked two-dimensional atomic crystals. Adv Funct Mater 29(17):1807893

    Article  CAS  Google Scholar 

  • Loan SA, Loan SA, Quteshi A, Kumarlayer SS (2009) A novel high breakdown voltage lateral bipolar transistor on SOI with multizone doping and multistep oxide. Semicond Sci Technol 24:025017

    Article  CAS  Google Scholar 

  • Manavizadeh N, Raissi F, Soleimani AS, Porfath M, Selberherr S (2011) Performance assessment of nanoscale field-effect diodes. IEEE Trans Electron Dev 58:2378–2384

    Article  CAS  Google Scholar 

  • Pal PK, Kaushik BK, Dasgupta S (2014) Investigation of symmetric dual-k spacer trigate FinFETs from delay perspective. IEEE Trans Electron Devices 61(11):3579–3585

    Article  CAS  Google Scholar 

  • Pan C-W, Cho S (2020) Gate-controlled bipolar junction transistor and operation method thereof. U.S. Patent 10,665,690, issued 26 May 2020

  • Rabaey JM, Chandrakasan AP, Borivoje N (2003) Digital integrated circuits: a design perspective, vol 7. Pearson Education, Upper Saddle River

    Google Scholar 

  • Raissi F (1996) A brief analysis of the field effect diode and breakdown transistor. IEEE Trans Electron Dev 43:362–365

    Article  Google Scholar 

  • Raissi F, Nordman JE (1994) Josephson fluxonid diode. Appl Phys Lett 65:1838–1840

    Article  Google Scholar 

  • Sahay S, Kumar MJ (2019) Junctionless field-effect transistors: design, modeling, and simulation. John Wiley & Sons, Hoboken

    Book  Google Scholar 

  • Sahu A, Kumar A, Tiwari SP (2020) Performance investigation of universal gates and ring oscillator using doping-free bipolar junction transistor. In: 2020 IEEE silicon nanoelectronics workshop (SNW), IEEE, p 125–126

  • Salem S, Tajabadi M, Saneei M (2017) The design and analysis of dual control voltages delay cell for low power and wide tuning range ring oscillators in 65 nm CMOS technology for CDR applications. AEU Int J Electr Commun 82:406–412

    Article  Google Scholar 

  • Sheikhian I, Raissi F (2003) High-speed digital family using field effect diode. Electron Lett 39(4):345–347

    Article  Google Scholar 

  • Sheikhian I, Raissi F (2005) An improved differential comparator with field effect diode output stage. J Circuits Syst Comput 14(05):931–937

    Article  Google Scholar 

  • Sheikhian I, Raissi F (2007) Simulation results for nanoscale field effect diode. IEEE Trans Electron Dev 54:613–617

    Article  CAS  Google Scholar 

  • Shelke SK, Nitnaware VN, Rode S (2017) Design of ring oscillator with better temperature, supply voltage and process stability with 32nm FDSOI transistor for ISM band application. In: 2017 11th International conference on intelligent systems and control (ISCO), IEEE, p 311–313

  • Sotoudeh A, Amirmazlaghani M (2018) Graphene-based field effect diode. Superlattices Microstruct 120:828–836

    Article  CAS  Google Scholar 

  • Srivastava PK, Hassan Y, Gebredingle Y, Jung J, Kang B, Yoo WJ, Singh B, Lee C (2019) Multifunctional van der Waals broken-gap heterojunction. Small 15(11):1804885

    Article  CAS  Google Scholar 

  • Streetman BG, Banerjee S (2000) Solid state electronic devices. Prentice Hall, New Jersey

    Google Scholar 

  • Su B-W, Yao B-W, Zhang X-L, Huang K-X, Li D-K, Guo H-W, Li X-K, Chen X-D, Liu Z-B, Tian J-G (2020) A gate-tunable symmetric bipolar junction transistor fabricated via femtosecond laser processing. Nanoscale Adv 2(4):1733–1740

    Article  CAS  Google Scholar 

  • Sze SM, Ng KK (2006) Physics of semiconductor devices. John wiley & sons, New Jersey

    Book  Google Scholar 

  • Touchaei BJ, Manavizadeh N (2016) Design and simulation of low-power logic gates based on nanoscale side-contacted FED. IEEE Trans Electron Devices 64(1):306–311

    Article  Google Scholar 

  • Vallabhaneni H, Japa A, Shaik S, Krishna KSR, Vaddi R (2014) Designing energy efficient logic gates with Hetero junction Tunnel fets at 20nm. In: 2014 2nd International conference on devices, circuits and systems (ICDCS), IEEE, pp 1–5

  • Washio K (2003) SiGe HBT and BiCMOS technologies for optical transmission and wireless communication systems. IEEE Trans Electron Dev 50:656–668

    Article  CAS  Google Scholar 

  • Yang Y, Salman AA, Ioannou DE, Beebe SG (2008) Design and optimization of the SOI field effect diode (FED) for ESD protection. Solid State Electron 52(10):1482–1485

    Article  CAS  Google Scholar 

  • Yang Y, Gangopadhyay A, Li Q, Ioannou DE (2009) Scaling of the SOI field effect diode (FED) for memory application. In: 2009 International semiconductor device research symposium, IEEE, p 1–2

  • Zhang Y, Chen H, Luo M, Li J, Wang W, Deng X, Bai Y, Chen H, Zhang B (2019) Silicon carbide bipolar junction transistor with novel emitter field plate design for high current gain and reliability. Semicond Sci Technol 34(4):45001

    Article  CAS  Google Scholar 

  • Zimpeck AL, Meinhardt C, Reis RAL (2015) Impact of PVT variability on 20 nm FinFET standard cells. Microelectron Reliab 55(9–10):1379–1383

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

  1. III-V Technologies Gmbh, Vienna, Austria

    Farshid Raissi

  2. Nano Electronics Lab (NEL), Shahid Rajaee Teacher Training University, 16785-163, Tehran, Iran

    Mina Amirmazlaghani & Ali Rajabi

Authors
  1. Farshid Raissi
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Mina Amirmazlaghani
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Ali Rajabi
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Mina Amirmazlaghani.

Ethics declarations

Conflict of interest

The authors declare that they have no known competing financial interests or personal relationships that could have appeared to influence the work reported in this paper.

Additional information

Publisher's Note

Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Raissi, F., Amirmazlaghani, M. & Rajabi, A. Field-effect BJT: an adaptive and multifunctional nanoscale transistor. Appl Nanosci 12, 1435–1447 (2022). https://doi.org/10.1007/s13204-021-02299-0

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s13204-021-02299-0

Keywords

Search

Navigation