Abstract
This article focused on the electrical characterization of silicon nanowires Schottky barriers following structural analysis of nanowires grown on p-type silicon by Metal (Ag) Assisted Chemical Etching (MACE) method distinguished by their different etching time (5 min, 10 min, 25 min). The silicon nanowires (SiNWs) are well aligned and distributed almost uniformly over the surface of a silicon wafer. In order to enable electrical measurement of the silicon nanowires device, Schottky barriers were performed by depositing Al on the vertically aligned silicon nanowires arrays. The electrical properties of the resulting Al/SiNWs diodes were characterized by current voltage I-V and capacity voltage C-V measurements. Unlike the conventional Schottky diode, asymmetrical current-voltage I-V characteristic has been observed with a rectification ratio <4. The metal-semiconductor-metal (M-S-M) model was used to analyze the I-V characteristics by including two Schottky barriers at the interface between metal and silicon nanowires. The electron transport behavior is explained by the thermionic field emission method (TFE) which adds the effect of the tunneling current compared to the conventional thermionic emission theory. The capacitance-voltage C-V characteristics of silicon nanowires depend on the bias voltage showing that the samples have an obvious space charge region. Symmetric behavior also appears in the C –V curves that confirm the MSM model.
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Ahlem Rouis and Neila Hizem designed and performed the experiments, analyzed the results and prepared figures and wrote the manuscript.
Adel Kalboussi andMohamed Hassen supervised the entire research, coordinated with authors.
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Rouis, A., Hizem, N., Hassen, M. et al. Electrical Properties of Silicon Nanowires Schottky Barriers Prepared by MACE at Different Etching Time. Silicon 14, 4731–4737 (2022). https://doi.org/10.1007/s12633-021-01261-7
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DOI: https://doi.org/10.1007/s12633-021-01261-7