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Study of Temperature Effect on Analog/RF and Linearity Performance of Dual Material Gate (DMG) Vertical Super-Thin Body (VSTB) FET

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Abstract

This work presents a simulation study of the influence of temperature on the performance of dual material gate (DMG) vertical super-thin body (VSTB) FET. The introduction of DMG causes a drop in the off-state current (Ioff) by ~99.18% and DIBL by 20%. Drop in the Ioff enhances the on-to-off current ratio (Ion/Ioff) by ~98.85%. A rigorous investigation on temperature dependency of DC, analog/RF, and linearity metrics was carried out. The zero temperature coefficient (ZTC) bias point for the DMG device was observed to be nearly at a gate bias of VG = 0.41 V. Various DC figures of merit (FoM) such as subthreshold swing (SS), Ion/Ioff, and threshold voltage (VT) show improvement with temperature fall. Lowering in temperature also leads to enhanced analog/RF performance by offering superior gm, gd, Cgg, Cgd, maximum fT, maximum GBP, intrinsic delay, TGF, TFP, GFP, and GTFP. However, linearity metrics like gm2, gm3, VIP2, VIP3, IIP3, IMD3, and 1-dB compression point show better performance with an increase in temperature.

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Acknowledgements

This work is an outcome of a project under CSIR-EMR-II (Sanction No.22 (0737)17/EMR-II dated 16th May, 2017), Govt. of India awarded to Electronics and Communication Engineering, NIT Silchar, Silchar 788010, India.

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  1. Department of Electronics and Communication Engineering, National Institute of Technology Silchar, Silchar, Assam, 788010, India

    Kuheli Roy Barman & Srimanta Baishya

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Barman, K.R., Baishya, S. Study of Temperature Effect on Analog/RF and Linearity Performance of Dual Material Gate (DMG) Vertical Super-Thin Body (VSTB) FET. Silicon 13, 1993–2002 (2021). https://doi.org/10.1007/s12633-020-00561-8

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