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Cu Protrusion of Different through-Silicon via Shapes under Annealing Process

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Abstract

The through-silicon via (TSV) 3D integration method has become one of the most widely used techniques for achieving system-level integration for applications that require smaller package sizes, higher interconnection density and high performance. This is because the TSV fabrication technology provides the mechanism for facilitating communications between various layers of the 3D integration system and for interconnecting stacked devices at wafer-level. Although there are several reported studies on TSV 3D integration R&D, with most of these studies focused on the improvement of TSV fabrication process, there are very limited in-depth studies associated with the TSV reliability issues and challenges. In this paper, we investigate the effect of TSV geometries on the associated TSV reliability factors. Different TSV geometries including I-type, tapered, elliptical, triangular, quadrangular and circular shapes (with same volume) are investigated to find the most reliable structure under annealing process. The results show that the tapered TSV shape releases thermo-mechanical stress more uniformly than other shapes and larger top surface shows better reliability.

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References

  1. W.S. Kwon, D.T. Alastair, K.H. Teo et al., Stress Evolution in Surrounding Silicon of Cu-Filled Through-Silicon via Undergoing Thermal Annealing by Multiwavelength Micro-Raman Spectroscopy, Appl Phys Lett, 2011, 98(23), p 232106. https://doi.org/10.1063/1.3596443

    Article  CAS  Google Scholar 

  2. H. Roth, Z. He and T. Mayer. Inspection of Through Silicon vias (TSV) and Other Interconnections in IC Packages by Computed Tomography. In: Proceeding of the 11th Electronics Packaging Technology Conference, Singapore, 2009. https://doi.org/10.1109/EPTC.2009.5416506

  3. T. Chen, J. Sun and R. Van. A Review About the Filling of TSV. In: Proceeding of the 16th International Conference on Electronic Packaging Technology, Changsha, China, 2015, pp 860. https://doi.org/10.1109/ICEPT.2015.7236716

  4. P. Kumar and I. Dutta, Influence of Electric Current on Diffusionally Accommodated Sliding at Hetero-Interfaces, Acta Mater., 2011, 63(1), p 2096–2108. https://doi.org/10.1016/j.actamat.2010.12.011

    Article  CAS  Google Scholar 

  5. I. Dutta, P. Kumar and M.S. Bakir, Interface-Related Reliability Challenges in 3-d Interconnect Systems with Through-Silicon vias, J. Min. Met. Mater. Soc., 2011, 63, p 70–77. https://doi.org/10.1007/s11837-011-0179-y

    Article  CAS  Google Scholar 

  6. J. De Messemaeker, O. V. Pedreira, H. Philipsen, E. Beyne, T. De Wolf and T. Van der Donck, et al., Correlation Between Cu Microstructure and TSV Cu Pumping. In: Proceeding of the Electronic Components and Technology Conference (ECTC). IEEE 64th, 2014, pp 613–619. https://doi.org/10.1109/ECTC.2014.6897349

  7. J. De Messemaeker, O. V. Pedreira, B. Vandevelde and H. Philipsen, I. De Wolf, E. Beyne, et al., Impact of Post-Plating Anneal and Throughsilicon via Dimensions on Cu Pumping. In: Proceeding of the Electronic Components and Technology Conference (ECTC). IEEE 63rd, 2013, pp 586–591. https://doi.org/10.1109/ECTC.2013.6575633

  8. C. Song, R. He, D. Yu, and L. Wan. Comprehensive Analysis of Thermal Mechanical Stress Induced by Cu TSV and Its Impact on Device performance. In: Proceeding of the 13th International Conference on Electronic Packaging Technology and High Density Packaging (ICEPT-HDP), 2012, pp 85–89. https://doi.org/10.1109/ICEPT-HDP.2012.6474575

  9. H. He, C. Song, C. Xu, L. Wang, and W. Zhang. Cu Pumping Effect Under Different Annealing Conditions. In: Proceeding of the 14th International Conference on Electronic Packaging Technology (lCEPT), 2013, pp 769–771. https://doi.org/10.1109/ICEPT.2013.6756578

  10. T. Jiang, C. Wu, L. Spinella, J. Im, N. Tamura, M. Kunz et al., Plasticity Mechanism for Copper Extrusion in Through-Silicon vias for Three-Dimensional Interconnects, Appl. Phys. Lett., 2013, 103(21), p 211906. https://doi.org/10.1063/1.4833020

    Article  CAS  Google Scholar 

  11. P.C. Andricacos, C.E. Uzoh, J. Dukovic et al., Damascene Copper Electroplating for Chip Interconnections, IBM J. Res. Dev., 1998, 42(5), p 567–574. https://doi.org/10.1147/rd.425.0567

    Article  CAS  Google Scholar 

  12. C. Rao, T. Wang, J. Cheng, Y. Liu and X. Lu, Investigations of Annealing Effect on TSV CMP. In: Proceeding of the International Conference on Planarization/CMP Technology (CPT). 11–13, Leuven, Belgium, 2017

  13. Q, Deng, L. Huang, J. Shang and M. Li, Study on TSV-Cu protrusion under different annealing conditions and optimization. In: Proceeding of the 17th International Conference on Electronic Packaging Technology, 2016. https://doi.org/10.1109/ICEPT.2016.7583158

  14. X. Jing, H. He, L. Ji, C. Xu, K. Xue, M. Su, et al., Effect of Thermal Annealing on TSV Cu Protrusion and Local Stress. In: Proceeding of the Electronic Components and Technology Conference (ECTC), IEEE 64th, 2014, pp 1116–1121. https://doi.org/10.1109/ECTC.2014.6897429

  15. X. Jing, U.-H. Lee, C. Xu, Z. Niu, H. Hao, J.-Y. Bae, J. Won and W. Zhang. Effect of Pre-CMP Annealing on TSV Pumping in Thermal Budget and Reliability Test. In: Proceeding of the International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA), IEEE 22nd, 2015. https://doi.org/10.1109/IPFA.2015.7224329

  16. S. Niese, P. Krueger, E. Zscheh, NanoXCT-A High-Resolution Technique for TSV Characterization. In: Proceeding of the AIP Conference, Vol 1378, Issue 1, 2011, pp 168–173. https://doi.org/10.1063/1.3615703

  17. H. He, X. Jing, L. Cao, D. Yu, K. Xue and W. Zhang. Influence of Thermal Annealing on the Deformation of Cu-Filled TSV. In: Proceeding of the Electronics System-Integration Conference, 2014. https://doi.org/10.1109/ESTC.2014.6962763

  18. H. Jin, J. Cai, Q. Wang, Y. Hu and Z. Liu. Effects of Post-CMP Annealing on TSV Cu Protrusion and Leakage Current. In: Proceeding of the 17th International Conference on Electronic Packaging Technology, 2016, pp1064–1068. https://doi.org/10.1109/ESTC.2014.6962763

  19. J.F. Hung, J.H. Lau, P.S. Chen, et al., Electrical Testing of Blind Through-Silicon via (TSV) for 3D IC Integration. In: Proceeding of the Electronic Components and Technology Conference. 2012, pp 564–570. https://doi.org/10.1109/ECTC.2012.6248886

  20. T. Nakamura, H. Kitada, Y. Mizushima, et al., Comparative Study of Side-Wall Roughness Effects on Leakage Currents in Through-Silicon via Interconnects. In: Proceeding of the 3D Systems Integration Conference (3DIC), 2012, pp 1–4. https://doi.org/10.1109/3DIC.2012.6262948

  21. J.M.E. Harper, C. Cabral Jr., P.C. Andricacos, et al., Mechanisms for Microstructure Evolution in Electroplated Copper Thin Films Near Room Temperature. J. Appl. Phy. 1999, 86(5), pp 2516–2525. https://doi.org/10.1063/1.371086

  22. I.H. Jeong, A. Eslami-Majd, J.P. Jung and N.N. Ekere, Electrical and Mechanical Analysis of Different TSV Geometries, Metals, 2020, 10(4), p 467. https://doi.org/10.3390/met10040467

    Article  Google Scholar 

  23. P. Bayat, D. Vogel, R.D. Rodriguez, E. Sheremet, D.R.T. Zahn and S. Rzepka, B. Michel., Thermo-mechanical Characterization of Copper Through-Silicon vias (Cu-TSVs) Using Micro-Raman Spectroscopy and Atomic Force Microscopy. Microelectron. Eng. 2015, 137, pp 101–104. https://doi.org/10.1016/j.mee.2015.02.004

  24. S.K. Ryu, K.H. Lu, J. Im, R. Huang and P.S. Ho, Stress-Induced Delamination of Through Silicon via Structures, AIP Conf. Proc., 2011 https://doi.org/10.1063/1.3615702

    Article  Google Scholar 

  25. P. Kumar, I. Dutta and M.S. Bakir., Interfacial Effects During Thermal Cycling of Cu-Filled Through-Silicon vias (TSV). J. Electron. Mater., 2012, 41 (2), 322–335

  26. C. Okoro, J.W. Lau, F. Golshany, K. Hummler and Y.S. Obeng, A Detailed Failure Analysis Examination of the Effect of Thermal Cycling on Cu TSV Reliability, IEEE Trans. Electron. Dev., 2014, 61(1), p 15–22.

    Article  CAS  Google Scholar 

  27. M. Dong, Q. Deng, Y. Zhang, T. Hang and M. Li, Study on the Relationship Between Cu Protrusion Behavior and Stresses Evolution in the Through-Silicon via Characterized by In-situ μ-Raman Spectroscopy, Microelectron. Reliab., 2020, 115, p 113949. https://doi.org/10.1016/j.microrel.2020.113949

    Article  CAS  Google Scholar 

  28. T. Jiang, S.K. Ryu, Q. Zhao, J. Im, R. Huang and P.S. Ho, Measurement and Analysis of Thermal Stresses in 3D Integrated Structures Containing Through-Silicon-vias, Microelectron. Reliab., 2013, 53, p 53–62. https://doi.org/10.1016/j.microrel.2012.05.008

    Article  CAS  Google Scholar 

  29. K. Lee, T. Fukushima, T. Tanaka, and M. Koyanagi., Thermomechanical Reliability Challenges Induced by High Density Cu TSVs and Metal Micro-Joining for 3-D ICs. International Reliability Physics Symposium (IRPS), IEEE, 2012

  30. M. Stiebing, E. Lortscher, W. Steller, D. Vogel, M.J.Wolf, T. Brunschwile, B. Wunderle., Stress Investigations in 3D-integrated Silicon Microstructures. In: 17th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystem, IEEE

  31. C. Si, Q. Fei, A. Tong, C. Pei., Effect of Electroplating Parameter on the TSV-Cu Protrusion during Annealing. In: Proceeding of the 3D Electronic Components and Technology Conference (ECTC), IEEE 66th, 2016, pp1599–1604. https://doi.org/10.1109/ECTC.2016.62

  32. T. Jiang, C. Wu, L. Spinella, J. Im, N.I. Tamura, M. Kunz, H.Y. Son, B.G. Kim, R. Huang and P.S. Ho, Plasticity Mechanism for Copper Extrusion in Through-Silicon vias for Three Dimensional Interconnects, Appl. Phys. Lett., 2013, 103(21), p 211906–211906.

    Article  Google Scholar 

  33. Y.S. Taulaukian, R.K. Kirby, R.E. Taylar, and P.D. Desai., Thermal Expansion, Metallic Elements and Alloys. Springer, US, 1975. https://books.google.co.uk/books/about/Thermal_expansion.html?id=XR1NAQAAIAAJ&redir_esc=y.

  34. W. Li, H. Ko, X. Zhang et al., Temperature-Dependent Elastic Modulus Model for Metallic Bulk Materials, Mech. Mater., 2019, 139, p 103194.

    Article  Google Scholar 

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Acknowledgments

The authors would also like to acknowledge the support of the Faculty of Science and Engineering, University of Wolverhampton for providing the sponsorship for the corresponding author’s Ph.D. studies.

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Authors and Affiliations

  1. School of Engineering, Faculty of Science and Engineering, University of Wolverhampton, Wolverhampton, TF2 9NN, UK

    Alireza Eslami Majd, Il Ho Jeong & Nduka Nnamdi Ekere

  2. Department of Materials Science and Engineering, University of Seoul, Seoul, 130-743, Republic of Korea

    Il Ho Jeong & Jae Pil Jung

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  1. Alireza Eslami Majd
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  2. Il Ho Jeong
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  4. Nduka Nnamdi Ekere
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AEM undertook FEM simulations and Analysis and IHJ developed the idea for this paper. JPJ and NNE supervised the work and contributed to developing the outline of the paper.

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Correspondence to Alireza Eslami Majd.

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Eslami Majd, A., Jeong, I.H., Jung, J.P. et al. Cu Protrusion of Different through-Silicon via Shapes under Annealing Process. J. of Materi Eng and Perform 30, 4712–4720 (2021). https://doi.org/10.1007/s11665-021-05775-4

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