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Influence Analysis of Back-Barrier and AIN Substrate on the High-Temperature Performance of an E-Mode Mg-Doped In0.2Ga0.8N Capped Gate High Electron Mobility Transistor for High-Power Switching Applications: A Simulation Study

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Abstract

This work presents an investigation of the performance assessment of E-mode Mg-doped In0.2Ga0.8N/Al0.23Ga0.77N/GaN/Al0.05Ga0.95N on AIN substrate use for high-power applications. The effect of the back-barrier on AIN substrate to boost the high-temperature performance of the device was analyzed using a hybrid technique of finite element simulations in the physics-based Synopsys TCAD 2018 simulation tool. The back-barrier on the AIN substrate improves the performance of the device through the improvement of electron mobility with increasing temperature. The proposed device’s maximum transconductance gm of 47 mS/mm at room temperature was significantly reduced to 16.1 mS/mm at a high temperature of 673 K by the AIN substrate and back-barrier interfacial layers. Boosted current flow of Vds = +15 V from +4 V was observed. A record off-state thermal breakdown voltage of 1200 V at a temperature of 673 K was achieved with the device. An appreciable high ratio of ION/IOFF for both devices at high temperatures was observed. There was no significant difference between up and down sweeps of the threshold voltage due to ohmic resistance. FE simulation indicated both AIN substrate and back-barrier interfacial layers had very small gate-drain turn-on voltages due to the limited threshold voltage (Vth). Consistent variation of GaN channel temperature from 329 K to 550 K for power dissipation from 1 to 10 W/mm with AIN substrate and back-barrier interfacial layers was observed.

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Acknowledgment

The authors gratefully acknowledge the support from the Centre for Material Science and Nanodevices, Department of Physics & Nanotechnology, Faculty of Engineering and Technology, SRM Institute of Science & Technology, Chennai, India, and the Department of Physics, Kano University of Science & Technology, Wudil, for providing all facilities to carry out this research work.

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Authors and Affiliations

  1. Department of Physics and Nanotechnology, SRM Institute of Science & Technology, Kattankulathur, 603203, Chennai, India

    Yusuf U. Tarauni & D. J. Thiruvadigal

  2. Department of Physics, Kano University of Science & Technology, Wudil, Nigeria

    Yusuf U. Tarauni & Maitama Hotoro

  3. Department of Physics, Bayero University, Kano, Nigeria

    Fatima Salmanu Koki

  4. Department of electronics and Communication Engineering, Anil Neerukonda Institute of Technology and Sciences Visakhapatnam, Visakhapatnam, 531162, India

    P. Murugapandiyan

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Tarauni, Y.U., Thiruvadigal, D.J., Hotoro, M. et al. Influence Analysis of Back-Barrier and AIN Substrate on the High-Temperature Performance of an E-Mode Mg-Doped In0.2Ga0.8N Capped Gate High Electron Mobility Transistor for High-Power Switching Applications: A Simulation Study. J. Electron. Mater. 51, 5219–5229 (2022). https://doi.org/10.1007/s11664-022-09767-5

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