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Robust Clock Timing Recovery for Performance Improvement in Digital Self-Synchronous OFDM Receivers

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Abstract

Due to constraints of cost and size for mobile devices, a digital self-synchronous OFDM receiver is preferable in mobile applications since it only requires economical crystal oscillators plus free-running analog front-end circuits. However, there are more stringent requirements for clock timing recovery tasks in such a self-synchronous receiver. This paper presents an efficient and robust clock timing recovery scheme for the digital self-synchronous OFDM receiver. It is based on the canonical Gardner structure, but new techniques are devised for performance improvement. A joint iterative estimation algorithm is used for error detection, which can not only improve the detection precision, but also maintain the loop’s dynamic performance. A direct control method based on a simple dynamic delay technique instead of the numerical-controlled oscillator mechanism is adopted to smoothly adjust the timing recovery by adaptively performing asynchronous resampling on the discrete sequence of the received signal. Theoretical analysis and numerical simulation results are also presented to verify the effectiveness of the proposed clock timing recovery scheme and conduct performance analysis and evaluation.

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Acknowledgments

This work was supported in part by the National Natural Science Foundation (NSF) of China (Grant No. 61201177) and in part by the Special Scientific Research Fund of Public Welfare Profession of China (Grant No. 201313009).

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Correspondence to Weiyang Xu.

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Hu, X., Xu, W. & Tian, Y. Robust Clock Timing Recovery for Performance Improvement in Digital Self-Synchronous OFDM Receivers. Wireless Pers Commun 95, 683–701 (2017). https://doi.org/10.1007/s11277-016-3792-9

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  • DOI: https://doi.org/10.1007/s11277-016-3792-9

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