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C-DMR: a cache-based fault-tolerant protection method for register file

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Abstract

The processor in the space environment is susceptible to the interference of high-energy particles, resulting in abnormal operation of the processor. These processors require fault-tolerant designs to handle various disturbances in the environment. In this paper, we propose a cache-based fault-tolerant protection method for the register file and we implement it in a RISC-V processor on the FPGA platform. This method uses spatial redundancy and information redundancy to reduce the propagation of single-bit errors, and it can resolve potential fault accumulation issues in the register file. Compared with other methods for register files, the proposed implementation has advantages in resource consumption by reusing the inherent data cache structure in the processor, only increasing 76% look-up tables and causing 6.09% extra delay. Finally, we evaluate the impact on system performance after removing some cachelines from the data cache and get conclusion that this design improves the processor’s fault tolerance with small impact on the original data cache performance.

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Authors and Affiliations

  1. School of Computer Science and Technology, Xidian University, Xi’an, 710071, China

    Zongnan Liang & Jiawei Nian

  2. Beijing SunWise Space Technology Ltd, Beijing, 100090, China

    Zongnan Liang, Jiawei Nian, Hongjin Liu & Xuru Wang

  3. Beijing Institute of Control Engineering, Beijing, 100090, China

    Hongjin Liu & Xuru Wang

  4. China Academy of Space Technology, Beijing, 100090, China

    Mengfei Yang

  5. State Key Laboratory of Space Intelligent Control Technology, Beijing, 100090, China

    Mengfei Yang

Authors
  1. Zongnan Liang
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  2. Jiawei Nian
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  3. Hongjin Liu
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  4. Xuru Wang
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  5. Mengfei Yang
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Correspondence to Hongjin Liu.

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Liang, Z., Nian, J., Liu, H. et al. C-DMR: a cache-based fault-tolerant protection method for register file. J Supercomput 79, 4383–4397 (2023). https://doi.org/10.1007/s11227-022-04836-2

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  • DOI: https://doi.org/10.1007/s11227-022-04836-2

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