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Circuit realization and FPGA-based implementation of a fractional-order chaotic system for cancellable face recognition

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Abstract

Biometric security has been developed in recent years with the emergence of cancellable biometric concepts. The idea of the cancellable biometric traits is concerned with creating encrypted or distorted traits of the original ones to protect them from hacking techniques. So, encrypted or distorted biometric traits are stored in databases instead of the original ones. This can be accomplished through non-invertible transforms or encryption schemes. In this paper, a cancellable face recognition algorithm is introduced based on face image encryption through a fractional-order multi-scroll chaotic system. The fundamental concept is to create random keys that will be XORed with the three components of color face images (red, green, and blue) to obtain encrypted face images. These random keys are generated from the Least Significant Bits of all state variables of a proposed fractional-order multi-scroll chaotic system. Lastly, the encrypted color components of face images are combined to produce a single cancellable trait for each color face image. The results of encryption with the proposed system are full-encrypted face images that are suitable for cancellable biometric applications. The strength of the proposed system is that it is extremely sensitive to the user’s selected initial conditions. The numerical simulation of the proposed chaotic system is done with MATLAB. Phase and bifurcation diagrams are used to analyze the dynamic performance of the proposed fractional-order multi-scroll chaotic system. Furthermore, we realized the hardware circuit of the proposed chaotic system on the PSpice simulator. The proposed chaotic system can be implemented on Field Programmable Gate Arrays (FPGAs). To model our generator, we can use Verilog Hardware Description Language HDL, Xilinx ISE 14.7 and Xilinx FPGA Artix-7 XC7A100T based on Grunwald-Letnikov algorithms for mathematical analysis. The numerical simulation, the circuit simulation and the hardware experimental results confirm each other. Cancellable face recognition based on the proposed fractional-order chaotic system has been implemented on FERET, LFW, and ORL datasets, and the results are compared with those of other schemes. Some evaluation metrics containing Equal Error Rate (EER), and Area under the Receiver Operating Characteristic (AROC) curve are used to assess the cancellable biometric system. The numerical results of these metrics show EER levels close to zero and AROC values of 100%. In addition, the encryption scheme is highly efficient.

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Acknowledgements

The authors are very grateful to all the institutions given in the affiliation list for performing this research work, successfully. The authors would like to thank Prince Sultan University for their support.

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Correspondence to Walid El-Shafai.

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Badr, I.S., Radwan, A.G., EL-Rabaie, ES.M. et al. Circuit realization and FPGA-based implementation of a fractional-order chaotic system for cancellable face recognition. Multimed Tools Appl (2024). https://doi.org/10.1007/s11042-023-15867-z

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