Abstract
FIR filters linear phase property eliminates the phase distortion for all frequencies and delays in the same amount of time. The FIR filter N tap will related to the delay that is based on an expression (N − 1)/(2 * Fs) wherein the Fs denote the frequency of sampling and at the time of the increase in N there is also an increase in delay. Until now, the researcher’s concentrate more on the silicon area and multiplier reduction. In this paper, the proposed pipelined FIR filter design with multiplying polynomials in even and odd length, reduces the number of multiplication and reduces the addition in sub filter block. Since, the proposed algorithm Parallel FIR—multiplying polynomials (PFIR-MP) performs with less multiplication while leads to area reduction in the FPGA processor. The 72-tap PFIR-MP reduces 18 multipliers when compared to the existing algorithms. The existing algorithms have 153 and 126 multipliers, whereas the proposed algorithm is with 108 multipliers. The overall performance of the various N- PFIR-MP evaluates through the enhancement of hearing aid signals. From the result, PFIR-MP shows the relation between the N taps and parallel structures in enhancing the hearing aid signals is acquired from dialect tamil language speaker, which shows the proportional variation in the ripple and transition due to syllable bandwidth and optimum N-tap obtained from various dialect syllable.
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Shanmugaraj, G., Kalaiarasi, N. Hearing aid speech signal enhancement via N-parallel FIR-multiplying polynomials for Tamil language dialect syllable ripple and transition variation. Cluster Comput 22 (Suppl 2), 3863–3874 (2019). https://doi.org/10.1007/s10586-018-2476-5
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DOI: https://doi.org/10.1007/s10586-018-2476-5