1 Introduction

Many devices that are used as input/output devices in electronic circuits have non-linear characteristics in wide signal range [1, 2]. In video signal processing field, to compensate these non-linearity, LUT (Look up table) using digital LSI circuit or line approximation using small scale circuit are used in general. However, LUT is not able to be mounted in low cost and line approximation cannot change their compensation characteristics [3,4,5,6]. Therefore, in circuits for nonlinearity compensation, the problems are the large circuit size and the compensation characteristics are not variable. In order to solve these problems, we have proposed a small-scale exponentiation conversion circuit that utilizes the non-linearity of semiconductor devices, and have fabricated a CMOS IC [7,8,9,10]. Figure 1 shows linearization concept of our exponentiation conversion circuit. Non-linear output signals from any sensers are approximately compensated by the exponentiation conversion circuit. Because of the power exponent value γ of the conversion circuit that is able to change to any values, this circuit can compensate wide range non-linearities. In previous research, we carried out confirmation of exponentiation conversion operation [7], electronic control of the compensation characteristics [8, 9] and expansion of signal dynamic range [9, 10]. These circuits are suitable for the interface circuit of AD converters because it can perform arbitrary non-linearity compensation by three-point adjustment [8]. The purpose of this study is to expand the signal dynamic range, and to reduce the supply voltage of this IC from 6.0 to 3.3 V, which allows it to be used in an MPU IC.

Fig. 1
figure 1

Linearization concept of exponentiation conversion circuit

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2 Principle of exponentiation conversion

A block diagram of the proposed exponentiation conversion circuit is shown in Fig. 2. In this circuit, a logarithmically transformed input signal ln(Iin) is multiplied by a power exponent value γ and then an exponential conversion is performed. By electronically arbitrarily changing the power exponent to any value used for multiplication, it is possible to compensate nonlinearity in input signals from various electronic devices.

Fig. 2
figure 2

Block diagram of exponentiation conversion circuit

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3 Design of circuit

In the exponentiation conversion circuit, it is necessary to logarithmically/exponentially convert the signal, so the exponential transfer characteristic in the subthreshold operation of MOSFET is utilized. The subthreshold operation is obtained in the weak inversion region where the gate-source voltage Vgs is less than the threshold voltage Vt. The drain current Ids can be expressed by the Eq. (1) and shows the exponential characteristic with respect to Vgs [11,12,13,14].

$$I_{{{\text{ds}}}} = \mu_{{{\text{eff}}}} \cdot C_{{{\text{ox}}}} \frac{W}{L} \cdot \left( {m - 1} \right) \cdot \left( \frac{kT}{q} \right)^{2} \cdot \left( {1 - e^{{ - \frac{{qV_{{{\text{ds}}}} }}{kT}}} } \right)e^{{\frac{{q\left( {V_{{{\text{gs}}}} - V_{{\text{t}}} } \right)}}{mkT}}}$$
(1)

where \(\mu_{{{\text{eff}}}}\) Effective mobility, \({ }C_{{{\text{ox}}}}\) Gate oxide capacitance, \(W\) Channel width, L Channel length, \(C_{{{\text{dm}}}}\) Maximum depletion capacitance, \(V_{{{\text{ds}}}}\) Drain-source voltage, \(m = 1 + \left( {C_{{{\text{dm}}}} /C_{{{\text{ox}}}} } \right)\).

Figure 3 shows the circuit configuration of the exponentiation conversion IC. The omitted back gates of the NMOS are all connected to GND. In Fig. 3, the input signal Iin is converted to the differential signal voltage Vg109 by the logarithmic conversion circuit. In the multiplying circuit, the differential signal voltage Vg109 is multiplied by a constant value, controlled by the multiplication control currents Imni and Imi, and converted to the differential signal voltage Vg2824. The differential signal voltage Vg2824 is converted into the output signal current Iout in the exponential conversion circuit. The operation of each circuit is described below.

Fig. 3
figure 3

Circuit configuration of the exponentiation conversion IC

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3.1 Logarithmic conversion circuit

We designed operational amplifier circuits to convert voltage and current to allow for voltage signal instead of current signal too. The relationship between the input voltage Vin and the input current Iin is expressed by the Eq. (2).

$$I_{{{\text{in}}}} = \frac{{V_{{{\text{in}}}} }}{{R_{{{\text{in}}}} }}$$
(2)

If the voltage to current conversion circuits is directly connected to the sources of M1 and M2 of the logarithmic conversion circuit, the maximum input voltage will be low due to lower the drain-source voltages of M31 and M32. Therefore, we obtained a wide input signal voltage range by flowing the converted signal current through the current mirror circuits CM1 to CM4 with low input voltage drop. CM1 to CM4 used four MOSFETs type current mirror circuits.

A differential voltage obtained by logarithmically converting the input signal current Iin flowing through M1 is input to the multiplying circuit. At that time, because the reference current Irin is flowing through M2, the input signal Vg109 to the multiplying circuit is expressed by the Eq. (3).

$$V_{g109} = V_{{{\text{gs}}1}} - V_{{{\text{gs}}2}} = S_{{\text{n}}} \cdot \log_{10} \left( {\frac{{I_{{{\text{in}}}} }}{{I_{{{\text{rin}}}} }}} \right)$$
(3)

Here, S is called the subthreshold swing value, which is equal to the increase amount of the gate-source voltage Vgs when the drain current Id is increased ten times in the subthreshold region range, and is represented by the expression (4) [11], [15,16,17].

$$S = \frac{{{\text{d}}V_{{{\text{gs}}}} }}{{{\text{d}}\left( {\log_{10} I_{{\text{d}}} } \right)}}$$
(4)

Also, subthreshold swing values of Pch and Nch MOSFETs are defined as S(p) and S(n), respectively.

3.2 Multiplying circuit

The multiplying circuit is shown in Fig. 4. Figure 4(a) and (b) show the conventional and the proposed circuit respectively [8]. The differential signal voltage Vg2824 output from the multiplying circuit is expressed by Eq. (5). It can be clarified that the multiplying value becomes larger when Imni is increased and smaller when Imi is increased.

$$V_{g2824} = \frac{{R_{{{\text{d3}}}} + R_{{{\text{d4}}}} }}{{R_{{{\text{s1}}}} }} \cdot \frac{{I_{{{\text{mni}}}} - I_{{{\text{mi}}}} }}{{I_{{{\text{mni}}}} + I_{{{\text{mi}}}} }} \cdot V_{g109}$$
(5)
Fig. 4
figure 4

Multiplying circuit

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3.3 Exponential conversion circuit

By distributing Vg2824 between the gates and sources of M24 and M25, and M28 and M29, the output signal current Iout of the exponential conversion circuit can be expressed by Eq. (6) using the reference current Irout.

$$V_{{{\text{g}}2824}} { } = { }\left( {S_{{\text{p}}} { } + { }S_{{\text{n}}} } \right) \cdot \log_{10} \left( {\frac{{I_{{{\text{out}}}} }}{{I_{{{\text{rout}}}} }}} \right){ }$$
(6)

Here, in order to obtain the output signal current Iout proportional to the γ power of the input signal current Iin, it is necessary to satisfy the expression (7), so that the power exponent value γ can be represented by expression (8).

$$I_{{{\text{out}}}} { } = { }I_{{{\text{rout}}}} \cdot \left( {\frac{{I_{{{\text{in}}}} }}{{I_{{{\text{rin}}}} }}} \right)^{\gamma }$$
(7)
$${ }\gamma = \frac{{R_{{{\text{d}}3}} + R_{{{\text{d}}4}} }}{{R_{{{\text{s}}1}} }} \cdot \frac{{I_{{{\text{mni}}}} - I_{{{\text{mi}}}} }}{{I_{{{\text{mni}}}} + I_{{{\text{mi}}}} }} \cdot \frac{1}{{1 + \frac{{S_{{\left( {\text{p}} \right)}} }}{{S_{{\left( {\text{n}} \right)}} }}}}$$
(8)

Equation (8) shows that the power exponent value γ can be controlled electronically by varying at least one of Imni and Imi. When Imni = 1 μA and Imi = 0 A, the power exponent value γ is the maximum. Since the ratio of the subthreshold swing values Sn and Sp for Nch and Pch MOSFETs is relatively stable against wide temperature variance, the power exponent value γ is also highly stable [8].

4 Signal dynamic range expansion

We have made three improvements to expand the signal dynamic range. The improvements are described below.

4.1 Optimizing MOSFET current density

We examined the signal dynamic range in the subthreshold region of the MOSFETs. Figure 5 and Fig. 6 shows the transfer characteristic of Nch and Pch MOSFET. In this IC, the signal dynamic range in the subthreshold region is 46.5 dB over the current range from 109 pA to 23.1 nA for the Nch MOSFET, and 41.5 dB over the current range from 147 pA to 17.5 nA for the Pch MOSFET. In order to use the subthreshold region fully, we changed the parallel device number of M1 and M2 from 12 to 360 devices, the parallel device number of M24 and M28 from 30 to 150 devices, and the parallel device number of M25 and M29 from 32 to 160 devices. By increasing the number of parallel devices, the current density was optimized and the signal dynamic range was expanded.

Fig. 5
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Transfer characteristics of Nch MOSFET

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Fig. 6
figure 6

Transfer characteristicsof Pch MOSFET

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4.2 Introduction of operational amplifier circuits into the multiplying circuit

In order to improve the linearity of the multiplying circuit, operational amplifier circuits OP3 and OP4 were introduced in the proposed circuit shown in Fig. 4(b). The signal dynamic range is expanded by matching the source differential voltage of the input MOSFETs to Vg109 through negative feedback using operational amplifier circuits.

4.3 Improvement of the exponential conversion circuit

The exponential conversion circuit is shown in Fig. 7. Figure 7(a) and (b) show the conventional and the proposed circuit respectively [8]. The signal dynamic range was expanded by adding the following innovations to the conventional circuit shown in Fig. 7(a) to improve the accuracy of the current ratio between Iout and Irout. Specifically, as shown in Fig. 7(b), we configured a circuit so local feedback is applied to the gate of M25 in order to improve the conversion accuracy by adjusting the voltage between the drain and source of M25 and M29 by adding M26 [18]. Although the gate voltage of M24 change according to the input current Iin, the output reference current Irout is kept at constant value by the negative feedback applied by OP5.

Fig. 7
figure 7

Exponential conversion circuit

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The signal dynamic range of the exponential conversion circuit was expanded by 0.8 dB by applying the proposed circuit.

5 Reducing power supply voltage

The conventional multiplying circuit shown in Fig. 4(a) has issue in reducing power supply voltage, because it is composed of M5 to M8, M9 to M10, and M12 to M13 stacked vertically. A folded cascode circuit is a general method for reducing the supply voltage. However, since the same signal current flows through the input and output portions of the circuit, the maximum voltage gain, which is determined by the ratio of the input voltage range to the output voltage range, cannot be increased by lowering the supply voltage. As a result, the maximum voltage gain of the multiplying circuit becomes small. The maximum exponent value γ decreases to 1.4 in a conventional folded cascode circuit. The proposed multiplying circuit shown in Fig. 4(b) achieves low supply voltage by parallelizing the input and output signal voltages with a current mirror circuit, and eliminates the restriction of the maximum voltage gain by setting the signal currents independently. In the proposed circuit, input bias current Ibi that decides input voltage range is obtained from each of M16 and M17. Also, output bias currents Ibo that decides output voltage range is obtained from each of M14 and M15. Differential signal current Vg109/Rs1 is added to input bias current Ibi, therefore drain current of M9 and M18 becomes (Ibi + Vg109/Rs1)/2 and drain current of M10 and M19 becomes (Ibi–Vg109/Rs1)/2. Because of synthesizing these currents by current mirror circuit consisting of M20 to M23, both of the differential signal current Vg109/Rs1 and output bias currents Ibo flows into the source terminals of the differential pairs M5 to M8 with input bias current Ibi eliminated. By applying the proposed circuit, even when the supply voltage is reduced to 3.3 V, the maximum exponent value γ can be obtained to 2.9.

In this circuit, the maximum input signal voltage Ibi × Rs1 can be freely expanded by increasing the input bias current Ibi, which does not appear in the differential signal current, so that the maximum voltage gain can be increased as much as necessary with a low Rs1. Negative feedback circuits are generally used to increase the voltage gain while keeping the DC operating point, but the higher cut-off frequency decreases as the voltage gain increases. In the case of this circuit, the higher cut-off frequency is determined by the circuit time constant, so its reduction can be suppressed.

6 Simulation results

We designed exponentiation conversion circuit as an integrated circuit in 0.6 μm CMOS process by using the SPICE circuit simulator “C3 (Circuit-Cube)” of JEDAT Inc. In this simulation, we used bsim3v3n model as N channel MOSFET and bsim3v3p model as P channel MOSFET. The characteristics obtained from the simulation are described below.

6.1 Logarithmic conversion circuit

The conversion characteristics of the logarithmic conversion circuit are shown in Fig. 8, where the signal dynamic range of the logarithmic conversion circuit has been expanded from 32.9 to 72.8 dB by optimizing the current density of MOSFETs M1 and M2.

Fig. 8
figure 8

Converting characteristic of logarithmic conversion circuit

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6.2 Multiplying circuit

The input/output characteristics of the multiplying circuit are shown in Fig. 9. By using operational amplifier circuits with negative feedback, the ratio of signal dynamic range expanded from 34.3 to 91.6% when the voltage range that multiplying circuit is able to output is defined as 100%. The signal dynamic range is defined as the input voltage range in which the change in the slope of the characteristics shown in Fig. 9 is within ± 5%.

Fig. 9
figure 9

Input–output characteristic of multiplying circuit

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6.3 Exponential conversion circuit

The conversion characteristics of the exponential conversion circuit are shown in Fig. 10, where the signal dynamic range of the exponential conversion circuit is expanded from 61.4 to 69.7 dB by optimizing the current densities of MOSFETs M24 to M25 and M28 to M29 and the circuit shown in Fig. 7(b).

Fig. 10
figure 10

Converting characteristic of exponential conversion circuit

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6.4 Signal dynamic range of the IC

Figure 11 shows the input/output characteristics when the power exponent value γ is set to 0.50, 1.0, and 2.0. In Fig. 11, the three characteristic lines pass through a single operating point determined by the reference current Irin.

Fig. 11
figure 11

Input–output characteristics of the IC. (liner scale)

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The signal dynamic range is the input current range within which the change in the slope of both logarithmic graphs of the input–output characteristics of the exponentiation conversion circuit shown in Fig. 12 is within ± 5%. The signal dynamic range of the input signal at each power exponent value γ is shown in Table 1, where the signal dynamic range expands from 17.5 to 42.7 dB when the power exponent value γ is set from 0.50 to 2.0 by optimizing the current density of the MOSFETs and negative feedback by operational amplifier circuits.

Fig. 12
figure 12

Input–output characteristicsof the IC. (logarithmic scale)

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Table 1 Signal dynamic range (simulation result)
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6.5 Frequency characteristics of the IC

Table 2 shows higher cut-off frequency of each circuit block and whole exponentiation conversion circuit. In this simulation, the power exponent value γ is set to 1.0 and the input signal bias current Iin equals to the reference current Irin in order to fix the output signal bias current Iout to the operating point. Table 2 shows slowing down in operating of these circuits due to reducing current density in MOSFETs to utilize weak inversion operation.

Table 2 Higher cut-off frequency (simulation result)
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7 Layout design of the IC

A layout diagram designed using a 0.6 μm CMOS process is shown in Fig. 13. Since the current density of the MOSFETs was optimized, a parallel configuration of 360 devices, which is the maximum, was used for M1 and M2 in the logarithmic conversion circuit.

Fig. 13
figure 13

Layout diagram

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8 Measured results

The measurement results of the prototype IC are described below. The measurement conditions were as follows. We used digital multimeter DT-4282 made by HIOKI Inc. for measurement.

$$\begin{gathered} V_{{{\text{DD}}}} :3.30{\text{V, }}V_{{\text{L}}} :2.30{\text{V, }}V_{{\text{M}}} :2.80{\text{V, }}I_{{{\text{CM}}}} :70.0\;{\mu A} \hfill \\ I_{{{\text{rin}}}} :1.00\;\mu {\text{A, }}I_{{{\text{rout}}}} :0.500\;\mu {\text{A}},{\text{Ambient}} {\text{temperture}}:24.0\;^\circ {\text{ C}} \hfill \\ \end{gathered}$$

Figures 14 and 15 show the measured results of the input/output characteristics when the power exponent value γ is set to 0.50, 1.0 and 2.0. In Fig. 14, the three characteristic lines pass through a single operating point determined by the reference current Irin. The signal dynamic range of the conventional circuit was 6.90 dB. However by optimizing the current density of the MOSFET and applying an operational amplifier to the circuit, the signal dynamic range was increased to 30.0 dB. These results are summarized in Table 3. The measured higher cut-off frequency was 3.40 kHz that is one-tenth of simulation result because of signal line parasitic capacitance increase in the measurement circuit board.

Fig. 14
figure 14

Measured Input–output characteristics. (linear scale)

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Fig. 15
figure 15

Measured input–output characteristics. (logarithmic scale)

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Table 3 Signal dynamic range. (measured result)
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9 Conclusions

We expanded the signal dynamic range and reduced the power supply voltage of the exponentiation conversion IC. By optimizing the current density of MOSFETs in the IC and applying operational amplifier circuits, the signal dynamic range has expanded from 17.5 to 42.7 dB in the range of the power exponent value γ from 0.50 to 2.0. Furthermore, a ew multiplying circuit was proposed, in which the maximum voltage gain can be set to a large value independent of the supply voltage. By applying the proposed circuit, even when the supply voltage was reduced to 3.3 V, the maximum exponent value γ can be obtained at 2.9. The signal dynamic range of prototype IC expanded to 30.0 dB when the power exponent value γ is set from 0.50 to 2.0 as measured result.

In the future, we will evaluate the characteristics of the prototype IC of the proposed circuit to confirm issues in actual operation and further improve performance.