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\(\mathbf {g_{m}/I_{D}}\) Sizing and analysis of a recycling folded-cascode OTA for ECG signal conditioning in 0.18 \(\upmu\)m  CMOS technology

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Abstract

This paper presents the design and analysis of a recycling folded-cascode (RFC) OTA intended for any generic capacitive-feedback ECG amplifier. The \(\frac{g_{m}}{I_{D}}\) methodology is utilized for sizing the RFC OTA, to achieve the prime targets of ultra-low power consumption and low input referred noise. The improved RFC topology is used to achieve higher CMRR. A detailed noise analysis of the overall IA is also included. An account of the chief contributors to the IA’s overall noise and design techniques to minimize the same is incorporated. Implemented using UMC 0.18 \(\upmu\)m, the complete circuit consumes a power of 0.47\(\upmu\) from a 1.8 V supply. The post-layout simulation results show that the designed circuit satisfies all essential specifications of an ECG acquisition system.

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  1. Department of Electrical Engineering, Indian Institute of Technology Hyderabad, Kandi, 502205, India

    Pankaj Kumar Jha, Pravanjan Patra & Ashudeb Dutta

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  1. Pankaj Kumar Jha
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Jha, P.K., Patra, P. & Dutta, A. \(\mathbf {g_{m}/I_{D}}\) Sizing and analysis of a recycling folded-cascode OTA for ECG signal conditioning in 0.18 \(\upmu\)m  CMOS technology. Analog Integr Circ Sig Process 115, 263–278 (2023). https://doi.org/10.1007/s10470-023-02159-7

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