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A 0.4 V, tail-less, fully differential trans-conductance amplifier: an all inverter-based structure

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Abstract

A tail-less, fully differential trans-conductance amplifier is presented in this paper. The proposed structure arranges the inverters as a core amplifier blocks in an elaborate manner to achieve fully differential function with tail-less power optimized elements. As the inverters are current push–pull structures, they reuse the bias current effectively to maximize the trans-conductance of block. The proposed amplifier structure exploits this to reduce the power consumption of proposed structure to 2.6 µW. Post-layout simulations with a load capacitance of 5 pF and power supply of 0.4 V have been performed to validate the performance of the proposed amplifier. The proposed amplifier exhibits a DC gain of 72.6 dB and a phase margin of 56° at unity-gain frequency of 327 kHz for a load of 5 pF. The proposed structure also delivers high common mode rejection ratio and power supply rejection ration values of 111 dB and 103 dB, respectively. To investigate the performance of the design over process and temperature variations, the Monte Carlo and corner simulations are performed, as well. The simulations are conducted with TSMC 180 nm CMOS technology file with Spectre simulation engine.

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Correspondence to Hassan Faraji Baghtash.

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Faraji Baghtash, H. A 0.4 V, tail-less, fully differential trans-conductance amplifier: an all inverter-based structure. Analog Integr Circ Sig Process 104, 1–15 (2020). https://doi.org/10.1007/s10470-020-01662-5

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