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A capacitor-less LDO regulator with dynamic transconductance enhancement technique

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Abstract

A current-efficient, capacitor-less low-dropout regulator (LDO) with fast-transient response for portable applications is presented in this paper. It makes use of an adaptively biased common-gate amplifier to extend loop bandwidth of the LDO at heavy loads. Moreover, a dynamic transconductance enhancement circuit based on capacitive coupling detects rapid voltage spikes at the output, providing an extra large current to charge or discharge the gate capacitance of power transistor momentarily during transient. The proposed circuit has been implemented in a 0.35 µm standard CMOS process. Experimental results show that this fully-integrated LDO can deliver 100 mA load current at 200 mV dropout voltage. It only consumes 15 μA quiescent current and is able to recover within 1 µs under the maximum load current change, with undershoot/overshoot voltages controlled below 250 mV. Loop stability is kept well at light loads (I load = 100 μA) even when a 100 pF output-parasitic capacitor is applied.

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Acknowledgment

This work was supported in part by the National Natural Science Foundation of China under Grant 61404020.

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Authors and Affiliations

  1. State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu, 610054, China

    Xin Ming, Nie Li, Xiao-min Zhang, Ze-kun Zhou & Zhuo Wang

  2. Phoenix Center of Maxim Integrated Products, 531 E Elliot Rd # 120, Chandler, AZ, 85225, USA

    Yang Lu

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  1. Xin Ming
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  2. Nie Li
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  3. Xiao-min Zhang
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  4. Yang Lu
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  5. Ze-kun Zhou
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  6. Zhuo Wang
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Correspondence to Xin Ming.

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Ming, X., Li, N., Zhang, Xm. et al. A capacitor-less LDO regulator with dynamic transconductance enhancement technique. Analog Integr Circ Sig Process 84, 433–444 (2015). https://doi.org/10.1007/s10470-015-0602-3

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  • DOI: https://doi.org/10.1007/s10470-015-0602-3

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