Abstract
In this paper a 2.45 GHz narrowband low noise amplifier (LNA) for wireless communication system is enunciated. The proposed CMOS Low Noise amplifier has been verified through cadence spectre RF simulation in standard UMC 90 nm CMOS process. The proposed LNA is designed by cascoding of two transistors; that is the common source transistor drives a common gate transistor. To achieve better power gain along with low noise figure, cascoding of two transistor and source degeneration technique is used and for low power consumption, the MOS transistors are biased in subthreshold region. At 2.45 GHz frequency, it exhibits power gain 31.53 dB. The S11, S22 and S12 of the circuit is −9.14, −9.22 and −38.03 dB respectively. The 1 dB compression point of the circuit is −16.89 dBm and IIP3 is −5.70 dBm. The noise figure is 2.34 dB, input/output match of −9.14 dB/−9.22 dB and power consumption 8.5 mW at 1.2 V.
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Acknowledgments
The authors are thankful to Department of Science and Technology, New Delhi and Defense Research Development Laboratory Hyderabad India for funding this project. They are also thankful to their Vice-Chancellor, Dr. M.K.Mishra and their Head of the Department, Dr. V.R.Gupta for their constant inspiration and encouragement.
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Kundu, R., Pandey, A., Chakraborty, S. et al. A CMOS low noise amplifier based on common source technique for ISM band application. Microsyst Technol 22, 2707–2714 (2016). https://doi.org/10.1007/s00542-015-2550-3
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DOI: https://doi.org/10.1007/s00542-015-2550-3