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More physical understanding of current characteristics of tunneling field-effect transistor leveraged by gate positions and properties through dual-gate and gate-all-around structuring

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Abstract

In this work, a tunneling field-effect transistor (TFET) in the structure that can maximize the electrostatic effects in determining its electrical performances is optimally designed and characterized. The featured device structure includes gate-all-around (GAA) channel and dual gates (DuGs) identified as control gate (CG) and adjust gate (AG), respectively. Not along with the design tasks, more fundamental studies on the effects of respective gates on device performances are sought. It has been found that the relatively different vicinities of the DuGs to source and drain junctions have differentiable dominances in controlling the primary direct-current (DC) parameters of the TFET including threshold voltage (Vth), on-state current (Ion), subthreshold swing (S), and on/off current ratio (Ion/Ioff). For the systematic study, four different cases have been presumably schemed giving the degree of freedom in gate workfunctions and inter-gate connectivity. It has been found that the CG at the source side more effectively modulates Vth, Ioff, and S, while the AG at the drain side shows the higher controllability over Ion and Ion/Ioff of the TFET. An optimally designed GAA DuG demonstrated Ion/Ioff > 1011 along with a small S of 14.6 mV/dec, which supports the strong potential of the GAA DuG TFET in the low-power applications.

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Funding

This work was supported by Brain Korea (BK) 21 Program in Seoul National University and also supported by the Gachon University Research Fund (GCU-2019-0324). The simulation task was supported by IDEC Program.

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Authors and Affiliations

  1. Department of Electronic Engineering, Gachon University, Seongnam, Gyeonggi-do, 13120, Republic of Korea

    Md. Hasan Raza Ansari & Seongjae Cho

  2. Inter-University Semiconductor Research Center (ISRC) and Department of Electrical and Computer Engineering, Seoul National University, Seoul, 08826, Republic of Korea

    Byung-Gook Park

Authors
  1. Md. Hasan Raza Ansari
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  2. Seongjae Cho
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  3. Byung-Gook Park
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Correspondence to Byung-Gook Park.

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Ansari, M.H.R., Cho, S. & Park, BG. More physical understanding of current characteristics of tunneling field-effect transistor leveraged by gate positions and properties through dual-gate and gate-all-around structuring. Appl. Phys. A 126, 839 (2020). https://doi.org/10.1007/s00339-020-04015-1

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  • DOI: https://doi.org/10.1007/s00339-020-04015-1

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