1 Introduction

In the electric power industry, the demand of medium and high voltages and high power inverter is increasing. Cascaded H-bridge inverters have obvious advantages such as simple structure, easy modularization, small voltage stress of switching transistors, large output power and good waveform quality of output voltage and have been the research hotspots of multi-level inverters in recent years [1,2,3]. Compared with the traditional cascaded H-bridges, the hybrid cascaded H-bridges can greatly reduce the number of DC power supplies and switching transistors under the condition of the same output levels [4,5,6]. Up to now, the modulation methods of the hybrid cascaded H-bridge inverter mainly include carrier phase-shifting PWM (PS-PWM) and level-shifted PWM (LS-PWM), in which PS-PWM can achieve power balance between cascaded units in the cascaded H-bridge. Compared with the PS-PWM, in-phase disposition PWM(IPD-PWM) can make the inverter output line voltage harmonic characteristics better. In [7,8,9,10,11,12], several hybrid cascaded H-bridge inverters use such modulation strategies as multilayer carrier stacking and hybrid frequency carrier PWM. However, when the number of hybrid cascaded units continues to increase, the modulation method will become more complex and output power between the same cascaded units will be unbalanced.

The output power unbalance between the same cascaded units will not only affect the service life of switching transistors and DC power supplies in H-bridge, but also hinder the maintenance and mass production of inverters in the later stage [13, 14]. In [15], with 1/4 output cycle as a unit, the power balance of the three-unit cascaded, seven-level H-bridge inverter is realized by exchanging the output voltage waveform of each unit H-bridge. In [16,17,18,19,20,21], the power balance between the cascaded H-bridge units is implemented by employing PD and carrier cycle, carrier reconstruction, pulse rotation and other power balance strategies, but the above research objects are all symmetrical cascaded H-bridge inverters. In [22, 23], for different types of hybrid cascaded H-bridges, selected harmonic elimination PWM (SHEPWM), step wave and carrier hybrid modulation are, respectively, applied to a three-unit 15-level inverter and two-unit 7-level inverter, and the output power balance between the units is implemented, but the output voltage waveform quality of the inverters will be affected by the power balance strategies.

In this paper, the III-hybrid cascaded H-bridge inverter is taken as the research object. First of all, in order to make the high-voltage and low-voltage units operate in low-frequency and high-frequency states, respectively, the III-inverter is modulated by the hybrid modulation method of the nearest level control (NLC) to the high-voltage unit and IPD-PWM to the low-voltage unit. Then, the state average method is used to analyze the output power distribution of the inverter under the hybrid modulation strategy and prove that the output powers between cascaded units are imbalanced. Finally, by performing a certain regular rotation cycle on the carrier, the output voltage of the cascaded unit is made to contain all the basic voltage waveforms, and the output power balance of the low-voltage unit is realized on the premise of maintaining the advantages of the modulation for the nearest level control and the in-phase disposition PWM to the III-inverter. Simulation and experiment verify the effectiveness of the proposed power balance strategy in this paper.

2 Modulation strategy of the III-inverter

2.1 Inverter topology and its operating principle

The topology of the III-hybrid cascaded H-bridge inverter is shown in Fig. 1. The DC side voltage of the high-voltage unit H1 is 3E, and the DC side voltage of the low-voltage units L1, L2 and L3 is all E; the output voltages of each H-bridge unit are, respectively, uH1, uL1, uL2, uL3, and the inverter output voltage is a sine wave of u0; the output current is a sine wave of i0. i0 can be expressed as:

$$ i_{0} = I\sin (\omega t - \delta ) $$
(1)
Fig. 1
figure 1

Topology of the III-hybrid cascaded H-bridge inverter

where u0 = uH1 + uL1 + uL2 + uL3, I is the amplitude of current i0, ω is the angular frequency of the output voltage and δ is the phase difference between voltage and current.

The output voltage of the high-voltage unit is ± 3E, and the output voltages of the three low-voltage units are all ± E. Thirteen levels of inverter output can be achieved by controlling the on and off of the switch transistor: ± 6E, ± 5E, ± 4E, ± 3E, ± 2E, ± E,0, of which the level ± 5E, ± 4E, ± 3E, ± 2E, ± E, 0 has voltage redundancy.

In order to avoid current backflow between cascaded units, when the inverter outputs a positive voltage, the cascaded unit only outputs a positive voltage of 3E or E or 0, while when the inverter outputs a negative voltage, the cascaded unit only outputs a negative voltage − 3E or − E or 0 (Table 1).

Table 1 Positive half-cycle III-inverter output level redundancy

2.2 Hybrid modulation strategy

Hybrid modulation is a modulation method that combines the advantages of the nearest level control and the in-phase disposition PWM, in which the nearest level control is used to modulate the high-voltage unit and the in-phase disposition PWM is used to modulate the low-voltage unit. The purpose of this modulation strategy is to make the high-voltage and low-voltage units operate in low-frequency and high-frequency states, respectively.

The modulation strategy can be described as follows: Firstly, in the positive and negative half cycles, the high-voltage unit modulation wave vH is compared with the two potentials of 3E and − 3E to obtain the high-voltage unit initial driving signal QH1x (x = 1,2,3,4) and make the corresponding switch transistor on, thus obtaining the output voltage waveform of the high-voltage unit in one cycle. Then the low-voltage unit modulation wave vm is compared with the triangular carrier vL1 and vL6, vL2 and vL5, vL3 and vL4 to obtain the initial drive signal QLxy (x = 1,2,3, y = 1,2,3,4) and make the corresponding switch transistor on, thus obtaining the output voltage waveform of the low-voltage unit in one cycle. Finally, the output voltages of the high-voltage and low-voltage units are added to obtain a 13-level output voltage waveform u0. The modulation wave can be expressed as:

$$ V_{{\text{H}}} = 6mE\sin (\omega t) $$
(2)
$$ v_{m} = \left\{ {\begin{array}{*{20}l} {6mE\sin (\omega t);} \hfill \\ {0 < \omega t \le \alpha _{3} ,} \hfill \\ {\pi - \alpha _{3} < \omega t \le \pi + \alpha _{3} ,} \hfill \\ {2\pi - \alpha _{3} < \omega t \le 2\pi ;} \hfill \\ {6mE\sin (\omega t) - 3E;} \hfill \\ {\alpha _{3} < \omega t \le \pi - \alpha _{3} ,} \hfill \\ {\pi + \alpha _{3} < \omega t \le 2\pi - \alpha _{3} ;} \hfill \\ \end{array} } \right. $$
(3)

where m is the modulation ratio.

Figure 2 shows the modulation principle of the high- and low-voltage units of the III-inverter. It can be seen from the figure in the positive half cycle of the output voltage, the output levels of each unit are + 3E, + E, 0, respectively, while in the negative half cycle, the output levels are − 3E, − E, 0. Therefore, there is no current backflow during the whole cycle.

Fig. 2
figure 2

Modulation principle of high-voltage and low-voltage units of the III-inverter

When vH ≥ 3E, the Fourier expansion of the square wave signal output by the high-voltage unit is:

$$ V_{{{\text{H}}1}} (t) = \frac{2}{\pi }\sum\limits_{{h = 1,3,5..}}^{\infty } {\frac{1}{h}} \cos \left( {h\arcsin \frac{1}{{12mE}}} \right)\sin (h\omega t) $$
(4)

The Fourier expansion of the output voltage waveform of the high-voltage unit is:

$$ u_{{{\text{H}}1}} (t) = \frac{2}{\pi }\sum\limits_{{j = 1}}^{n} {\sum\limits_{{h = 1,3,5,..}}^{\infty } {\frac{1}{h}} } \cos \left( {h\arcsin \frac{j}{{12mE}}} \right)\sin (h\omega t) $$
(5)

The Fourier expansion of the pulse signal output by the entire low-voltage unit is:

$$ \begin{aligned} & V_{{\text{L}}} (t) = 6mE\sin (\omega t) - \frac{2}{\pi }\sum\limits_{{j = 1}}^{n} {\sum\limits_{{h = 1,3,5,..}}^{\infty } {\frac{1}{h}} } \\ & \cos \left( {h\arcsin \frac{j}{{12mE}}} \right)\sin (h\omega t) \\ \end{aligned} $$
(6)

Since the total voltage amplitude on the DC side of the inverter is 6E, the fundamental wave expressions of the total output voltage of the inverter and the output voltages of the high-voltage and low-voltage units can be obtained as:

$$ u_{0} (t) = 6mE\sin (\omega t) $$
(7)
$$ u_{{{\text{H}}1}} (t) = \frac{{12mE}}{\pi }\left( {\sum\limits_{{i = 1}}^{n} {\sin (\omega t)\cos \left( {\arcsin \frac{i}{{12mE}}} \right)} } \right) $$
(8)
$$ \begin{aligned} & u_{{\text{L}}} (t) = 6mE\sin (\omega t) \\ & \quad - \frac{{12mE}}{\pi }\left( {\sum\limits_{{i = 1}}^{n} {\sin (\omega t)\cos \left( {\arcsin \frac{i}{{12mE}}} \right)} } \right) \\ \end{aligned} $$
(9)

When E is fixed, the fundamental wave of the total output voltage of inverter only varies with the modulation ratio m. At the same time, the fundamental wave amplitude of the output voltage of the high- and low-voltage units is always smaller than that the total output voltage of the inverter. Therefore, this modulation strategy does not have the problem of current backflow.

3 Power analysis based on the hybrid modulation strategy

3.1 Low-voltage unit power analysis

Assuming that the average output voltage of the low-voltage unit in a switching cycle is uLx, and the duty cycle is dx (x = 1, 2, 3), the average output voltage of the low-voltage unit during a switching cycle can be expressed as:

$$ u_{{{\text{L}}x}} = \left\{ {\begin{array}{*{20}c} {d_{x} E,} & {v_{{\text{m}}} \ge 0;} \\ { - d_{x} E,} & {v_{{\text{m}}} < 0;} \\ \end{array} } \right. $$
(10)

In practical applications, the frequency of the modulating wave is usually much smaller than the carrier frequency, and it can be considered that the modulating wave in a switching period is a fixed value. Therefore, the duty cycle dx of the low-voltage unit can be expressed as:

$$ d_{x} = \left\{ {\begin{array}{*{20}l} {0,} \hfill & {0 \le v_{{\text{m}}} < (3 - x)E;} \hfill \\ {\frac{{v_{{\text{m}}} }}{E} - (3 - x),} \hfill & {(3 - x)E \le v_{{\text{m}}} < (4 - x)E;} \hfill \\ {1,} \hfill & {(4 - x)E \le v_{{\text{m}}} \le 3E;} \hfill \\ \end{array} } \right. $$
(11)

Thus, the average output voltage in the positive half cycle can be obtained as:

$$ u_{{\text{L}}} = \sum\limits_{{x = 1}}^{3} {E * d_{x} } = v_{{\text{m}}} $$
(12)

It can be seen that the average value of the output voltage of the low-voltage unit in the positive half cycle is equal to the instantaneous value of the modulation wave vm. According to the symmetry of the inverter output voltage, the low-voltage unit modulation wave vm can be divided into four regions I, II, III and IV in one cycle. Then, the vm can be divided into 12 basic voltage waveforms uL11 ~ uL34 according to the different cascaded unit. uLx1 ~ uLx4 (x = 1,2,3) are the output voltage waveforms of the four segments of the xth low-voltage unit in one cycle. α1 ~ α5 are the angles corresponding to the intersection of the modulation wave vm with each voltage level within 0 ~ π/2, of which α1 = arcsin(1/6 m), α2 = arcsin(1/3 m), α3 = arcsin(1/2 m), α4 = arcsin(2/3 m), α5 = arcsin(5/6 m).

Figure 3 shows the partitioning principle of the modulation voltage waveform of each low-voltage unit. From the figure, the expressions of the voltages uL11 ~ uL34 in each area in a period can be, respectively, obtained.

Fig. 3
figure 3

Schematic diagram of modulation voltage waveform division in low-voltage unit

In Eqs. (13), (14) and (15) are, respectively, given the voltage expressions of uL11, uL21 and uL31 in area I:

$$ u_{{{\text{L}}11}} = \left\{ {\begin{array}{*{20}l} {0,} \hfill & {0 \le \omega t < \alpha _{2} ,\alpha _{3} < \omega t < \alpha _{5} ;} \hfill \\ {6mE\sin (\omega t) - 2E,} \hfill & {\alpha _{2} \le \omega t \le \alpha _{3} ;} \hfill \\ {6mE\sin (\omega t) - 5E,} \hfill & {\alpha _{5} \le \omega t < \frac{\pi }{2};} \hfill \\ \end{array} } \right. $$
(13)
$$ u_{{{\text{L}}21}} = \left\{ {\begin{array}{*{20}l} {0,} \hfill & {0 \le \omega t < \alpha _{1} ,\alpha _{2} < \omega t < \alpha _{4} ;} \hfill \\ {6mE\sin (\omega t) - E,} \hfill & {\alpha _{1} \le \omega t \le \alpha _{2} ;} \hfill \\ {6mE\sin (\omega t) - 4E,} \hfill & {\alpha _{4} \le \omega t < \alpha _{5} ;} \hfill \\ {E,} \hfill & {\alpha _{5} \le \omega t < \frac{\pi }{2};} \hfill \\ \end{array} } \right. $$
(14)
$$ u_{{{\text{L}}31}} = \left\{ {\begin{array}{*{20}l} {0,} \hfill & {\alpha _{1} < \omega t < \alpha _{3} ;} \hfill \\ {6mE\sin (\omega t),} \hfill & {0 \le \omega t < \alpha _{1} ,} \hfill \\ {6mE\sin (\omega t) - 3E,} \hfill & {\alpha _{3} \le \omega t < \alpha _{4} ;} \hfill \\ {E,} \hfill & {\alpha _{4} \le \omega t < \frac{\pi }{2};} \hfill \\ \end{array} } \right. $$
(15)

The voltage expressions and principles of the other three regions are the same as them.

Combining Eq. (1),we can get the average output power PLxy of each low-voltage unit under the basic voltage of each area:

$$ P_{{{\text{L}}xy}} = \frac{2}{\pi }\int_{\alpha }^{\beta } {u_{{{\text{L}}xy}} i_{0} } {\text{d(}}\omega t) $$
(16)

where α and β are the end points of each interval of the segmented voltage.

According to Eq. (16) and the expressions of the basic voltage waveforms uL11 ~ uL34, the two-dimensional coordinate curve of PLxy with respect to the variation of power factor angle δ can be drawn, as shown in Fig. 4. By inspecting the relationship between the output power average values PLxy and δ in the positive half cycle and negative half cycle, it can be seen that the average power of each basic voltage area has the following relationship:

$$ \left\{ {\begin{array}{*{20}c} {P_{{L11}} = P_{{L13}} ,P_{{L21}} = P_{{L23}} ;} \\ {P_{{L31}} = P_{{L33}} ,P_{{L12}} = P_{{L14}} ;} \\ {P_{{L22}} = P_{{L24}} ,P_{{L32}} = P_{{L34}} ;} \\ \end{array} } \right. $$
(17)
Fig. 4
figure 4

Active power versus δ in positive and negative half-cycle

In particular, when the power factor angle δ is 0, the power of each area has the following relationship:

$$ \left\{ {\begin{array}{*{20}c} {P_{{L11}} = P_{{L12}} = P_{{L13}} = P_{{L14;}} } \\ {P_{{L21}} = P_{{L22}} = P_{{L23}} = P_{{L24;}} } \\ {P_{{L31}} = P_{{L32}} = P_{{L33}} = P_{{L34;}} } \\ \end{array} } \right. $$
(18)

From Fig. 2, it can be drawn that the low-voltage unit outputs the total average power PLx (x = 1, 2, 3) in one cycle, which can be expressed by Eq. (19). Figure 5 shows the variation of the output power PLxy of the low-voltage unit with the power factor δ. It can be seen that the output powers of each low-voltage unit are unbalanced.

$$ \left\{ {\begin{array}{*{20}c} {P_{{L1}} = \frac{1}{4}(P_{{L11}} + P_{{L12}} + P_{{L13}} + P_{{L14}} )} \\ {P_{{L2}} = \frac{1}{4}(P_{{L21}} + P_{{L22}} + P_{{L23}} + P_{{L24}} )} \\ {P_{{L3}} = \frac{1}{4}(P_{{L31}} + P_{{L32}} + P_{{L33}} + P_{{L34}} )} \\ \end{array} } \right. $$
(19)
Fig. 5
figure 5

Relation between active power of low-voltage unit and δ

3.2 Implementation of power equalization based on hybrid modulation

From the above analysis, it can be known that the root cause for the output powers to be unbalanced in the low-voltage unit is that the output voltage of each unit does not contain all the basic voltage waveforms. In order to make the output powers of each low-voltage unit to be balanced, the output of the low-voltage unit should be made to include all the basic voltage waveforms within a certain period of time. According to Eq. (17), the output voltage includes 6 segments at least in a certain period of time, u11 or u13, u21 or u23, u31 or u33, u12 or u14, u22 or u24, u32 or u34, and it takes 3/2 cycles to cover the 6 kinds of basic voltage waveforms.

Next, the basic voltage waveforms covered by each unit in 3/2 cycles are replaced in the way as shown in Fig. 6.

Fig. 6
figure 6

Basic voltage replacement principle of low-voltage cascaded H-bridge unit

A replacement of the basic voltage waveforms of the connected units is performed to make each unit cover 6 basic voltage waveforms in a 3/2 cycle. In this way, the output power of each unit can be balanced.

And then, an improvement of the modulation mode of the inverter is made by changing the carrier according to Fig. 6. The modulation principle can be stated as shown in Figs. 7 and 8.

Fig. 7
figure 7

Schematic diagram of 13-level power balance modulation of the III-hybrid cascaded H-bridge

Fig. 8
figure 8

The relationship between active power of low-voltage cascaded unit and δ after improved modulation strategy

As shown in Figs. 7 and 8, after adjusting the carrier, each low-voltage unit contains 6 basic voltage waveforms after 3/2 cycles, thus implementing the balance of the power in the low-voltage unit.

4 Comparative analysis of simulation and experimental results

In order to verify the effectiveness of the modulation strategy proposed in this paper, a simulation model of the hybrid cascaded H-bridge 13-level inverter is established in MATLAB 2019b/Simulink, and its experimental platform (Fig. 15) is constructed. The parameters utilized by simulation and experiment are: the DC side voltage in high-voltage unit VH = 36 V, the DC side voltage in low-voltage unit, VL = 12 V, carrier frequency fc = 5 kHz, modulation ratio m = 0.7 and 0.9, load resistance R = 10Ω, filter inductance L = 4mH. The results obtained by simulation are shown in Figs. 9, 10 and 11, and the results obtained by experiment are shown in Figs. 12, 13 and 14.

Fig. 9
figure 9

Simulation waveforms of inverter output voltage and power before power balance

Fig. 10
figure 10

Simulation waveform of inverter output voltage and power after power balance

Fig. 11
figure 11

Output voltage frequency spectrum distribution before and after power balance

Fig. 12
figure 12

Inverter output voltage and power test results before power balance

Fig. 13
figure 13

The measured output voltage and power results of the inverter after power balance

Fig. 14
figure 14

Output voltage frequency spectrum before and after power balance for m = 0.9

4.1 Comparison of simulation results

Figures 9,10 and 11 show a 13-level simulation voltage waveforms output by the inverter for m = 0.9 and m = 0.7 and the frequency spectrum distribution for m = 0.9 before and after the power balance is not reached. From Fig. 9, it can be seen that the fundamental voltage is 64.75 V and THD = 9.93%, and in the low-voltage unit, the average powers of the inverter present a stepwise increasing distribution, which are, respectively, 7.74 W, 32.7 W and 44.9 W. When m = 0.7, the inverter outputs an 11-level voltage waveform, and the output powers of the low-voltage unit are, respectively, 3.73 W, 10.3 W and 31.4 W. Obviously, there all exists the problem of the unbalanced output power in the low-voltage cascaded unit for the two modulation ratios.

After the carrier in the low-voltage unit is changed according to the method proposed in the paper, the situation is completely different. Through the theoretical calculation, the output powers of the low-voltage unit can be, respectively, obtained as 28.32 W, 28.32 W and 28.35 W when the modulation ratio m = 0.9. Figure 10 shows the output voltage and power simulation waveforms of the inverter after the powers balance, and Fig. 11 shows the output voltage frequency spectrum distribution before and after the power balance. From the figures, it can be seen that none of the output voltage waveforms, THD and fundamental voltage value are changed, which shows that the quality of the output voltage waveform of the inverter is not affected after the carrier is changed. At the same time, the output power of each unit is balanced, which proves that the power balance can be indeed achieved by replacing the basic voltage waveforms of the cascaded units.

4.2 Experimental verification

Figures 12,13 and 14, respectively, show a 13-level experimental voltage waveforms output by the inverter for m = 0.9 and m = 0.7 and the frequency spectrum distribution for m = 0.9 before and after the power balance is not reached.

Before the power balance is not reached, when the modulation ratio m = 0.9 and m = 0.7, the output voltage uLx of the connected unit, the output current i0, the output power PLx of the low-voltage unit and the total output voltage waveform u0 of the inverter are shown in Fig. 12. (Since the oscilloscope has only four output channels, the output voltage of the high-voltage unit is measured separately.) It can be seen from the figure that the measured results of the output voltage and output power of each unit are consistent with the simulation results, the output voltage is stable, and there is no current backflow. However, the output power of the low-voltage unit is unbalanced, which proves that the hybrid modulation strategy is correct and effective for the hybrid cascaded H-bridge 13-level inverter and that the power unbalance exists between the low-voltage units.

From Fig. 13, it can be seen that after the power is balanced, the output voltage waveform of each low-voltage unit is no longer symmetrical within a single cycle, and on replacing the output voltage of each low-voltage unit according to a certain rule, the output power will be also no longer symmetrical, but the output powers between the low-voltage units are balanced within 3/2 cycles. Furthermore, it can be seen from Fig. 14 that when m = 0.9, the measured frequency spectrum of the output voltage is consistent with the simulation result before and after the inverter power balance is reached. These results fully prove the correctness and effectiveness of the power balance modulation strategy proposed in this paper (Fig. 15).

Fig. 15
figure 15

Experimental platform

5 Conclusion

In this paper, the modulation strategy of the hybrid cascaded H-bridge thirteen-level inverter is studied, and a power balance modulation strategy is proposed. Firstly, the output power relationship expressions of each low-voltage unit are theoretically derived. Then, according to the theoretical analysis results, the carrier of the hybrid modulation strategy is regularly rotated. Finally, on the premise of ensuring the quality of the output voltage waveform of the inverter, the balance of the output power of each low-voltage cascaded unit is realized. Both simulation and experimental results show that under the control of the power balance modulation strategy, the output voltage waveform quality of the system is good, there is no current backflow, and the powers between the low-voltage units are balanced, which fully verifies the reasonability and effectiveness of the power balance strategy.