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A Highly Linear, Low Power, Highly Efficient, CMOS Wideband Power Amplifier for 2–5 GHz Wireless Communications

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Abstract

This paper presents a detailed design of a broadband power amplifier (PA) utilizing 0.18-μm CMOS technology, operating in the frequency range of 2–5 GHz. This ultra-wideband (UWB) power amplifier uses a cascode topology with current reuse to enhance gain over the desired frequency band, utilizing an inductive source degenerate design to achieve the best linearity and output power and gain while maintaining a wide bandwidth. The inductive source degenerate adopts bondwire and microstrip line design. The paper includes extensive analysis, simulation results, and measurements to verify the performance of the amplifier and demonstrate its suitability for broadband power amplifier applications. The measured results for the proposed UWB power amplifier show excellent performance, with an impressive third-order input intercept point (IIP3) ranging from 15 to 18.7 dBm over the frequency range of 2–5 GHz. The output third-order intercept point (OIP3) ranges from 33 to 35 dBm. Additionally, the gain flatness is specified as 12.5 ± 1.5 dB. The reverse isolation is greater than or equal to − 40 dBm. The PA has a P1dB output power (OP1dB) of 10.2 dBm at 3 GHz, 9.2 dBm at 4 GHz, and 9.2 dBm at 5 GHz, respectively. The PA has a P1dB power-added efficiency of 30.5% at 3 GHz, 23% at 4 GHz, and 22% at 5 GHz with a 50 Ω load termination. The power dissipation is 33.3 mW at a supply voltage of 1.8 V. In addition, the PA has an excellent small group delay variation of ± 65 ps. The chip area is 1.01 × 1.08 mm2, including the pads. The proposed UWB PA demonstrates exceptional linearity, efficiency, and group delay in the 2–5 GHz frequency band.

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Acknowledgements

This work was supported in part by the Ministry of Science and Technology of Taiwan, R.O.C., under Grant MOST 111-2221-E-507-003. National Applied Research Laboratories Taiwan semiconductor research institute (TSRI) for its technical support and measurement. Taiwan.

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All authors declare that: (i) they have not received any support, financial or otherwise, from any organization that may be interested in the submitted work; (ii) have no other relationship or activity that might affect the submitted work.

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  1. Department of Electrical Engineering, National Quemoy University, University Road 1, Jinning Township, Kinmen, 892, Taiwan

    Jun-Da Chen & Jia-bin Qian

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  1. Jun-Da Chen
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Correspondence to Jun-Da Chen.

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Chen, JD., Qian, Jb. A Highly Linear, Low Power, Highly Efficient, CMOS Wideband Power Amplifier for 2–5 GHz Wireless Communications. Circuits Syst Signal Process (2024). https://doi.org/10.1007/s00034-024-02693-3

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