Skip to main content
SpringerLink
Log in

Hardware Architectures for Computing Eigendecomposition-Based Discrete Fractional Fourier Transforms with Reduced Arithmetic Complexity

  • Published:
Circuits, Systems, and Signal Processing Aims and scope Submit manuscript

Abstract

The fractional Fourier transform (FrFT) is a useful mathematical tool for signal and image processing. In some applications, the eigendecomposition-based discrete FrFT (DFrFT) is suitable due to its properties of orthogonality, additivity, reversibility and approximation of continuous FrFT. Although recent studies have introduced reduced arithmetic complexity algorithms for DFrFT computation, which are attractive for real-time and low-power consumption practical scenarios, reliable hardware architectures in this context are gaps in the literature. In this paper, we present two hardware architectures based on the referred algorithms to obtain N-point DFrFT (\(\textit{N}=4\textit{L}\), L is a positive integer). We validate and compare the performance of such architectures by employing field-programmable gate array implementations, co-designed with an embedded hard processor unit. In particular, we carry out computer experiments where synthesis, error and latency analyses are performed, and consider an application related to compact signal representation.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8

Similar content being viewed by others

Data availability

Not applicable.

Code availability

Not applicable.

Notes

  1. The term “reduced”, in the title of our paper and throughout its text, refers to the algorithms proposed in [8], which are used as a starting point for the hardware architectures to be presented. Therefore, the use of such a term does not indicate that, in this paper, an algorithm with even lower arithmetic complexity is being proposed, compared to the cited reference.

References

  1. A. Acharya, S. Mukherjee, Designing a re-configurable fractional Fourier transform architecture using systolic array. Int. J. Comput. Sci. Issues 7, 159 (2010)

    Google Scholar 

  2. R.E. Blahut, Fast Algorithms for Signal Processing (Cambridge University Press, Cambridge, 2010). https://doi.org/10.1017/cbo9780511760921

    Book  Google Scholar 

  3. C. Candan, M. Kutay, H. Ozaktas, The discrete fractional Fourier transform. IEEE Trans. Signal Process. 48(5), 1329–1337 (2000). https://doi.org/10.1109/78.839980

    Article  MathSciNet  Google Scholar 

  4. C. Candan, On higher order approximations for Hermite–Gaussian functions and discrete fractional Fourier transforms. IEEE Signal Process. Lett. 14(10), 699–702 (2007). https://doi.org/10.1109/LSP.2007.898354

    Article  Google Scholar 

  5. A. Cariow, J. Papliński, D. Majorkowska-Mech, Some structures of parallel VLSI-oriented processing units for implementation of small size discrete fractional Fourier transforms. Electronics 8(5), 509 (2019). https://doi.org/10.3390/electronics8050509

    Article  Google Scholar 

  6. G. Cincotti, T. Murakawa, T. Nagashima et al., Enhanced optical communications through joint time-frequency multiplexing strategies. J. Lightwave Technol. 38(2), 346–351 (2020). https://doi.org/10.1109/JLT.2019.2942452

    Article  Google Scholar 

  7. J.R. de Oliveira Neto, J.B. Lima, Discrete fractional Fourier transforms based on closed-form Hermite–Gaussian-like DFT eigenvectors. IEEE Trans. Signal Process. 65(23), 6171–6184 (2017). https://doi.org/10.1109/TSP.2017.2750105

    Article  MathSciNet  Google Scholar 

  8. J.R. de Oliveira-Neto, J.B. Lima, G.J. da Silva et al., Computation of an eigendecomposition-based discrete fractional Fourier transform with reduced arithmetic complexity. Signal Process. 165, 72–82 (2019). https://doi.org/10.1016/j.sigpro.2019.06.032

    Article  Google Scholar 

  9. A. Gómez-Echavarría, J.P. Ugarte, C. Tobón, The fractional Fourier transform as a biomedical signal and image processing tool: a review. Biocybern. Biomed. Eng. 40(3), 1081–1093 (2020). https://doi.org/10.1016/j.bbe.2020.05.004

    Article  Google Scholar 

  10. M.T. Hanna, N.P.A. Seif, W.A. El-Maguid-Ahmed, Discrete fractional Fourier transform based on the eigenvectors of tridiagonal and nearly tridiagonal matrices. Digit. Signal Process. 18(5), 709–727 (2008). https://doi.org/10.1016/j.dsp.2008.05.003

    Article  Google Scholar 

  11. Y. Hu, CORDIC-based VLSI architectures for digital signal processing. IEEE Signal Process. Mag. 9(3), 16–35 (1992). https://doi.org/10.1109/79.143467

    Article  Google Scholar 

  12. Intel, ALTERA_CORDIC IP core user guide (Intel, 2017). https://www.intel.com/content/www/us/en/docs/programmable/683808/current/altera-cordic-ip-core-user-guide.html

  13. Intel, Cyclone V Device Datasheet (Intel, 2019). https://www.intel.com/programmable/technical-pdfs/683801.pdf

  14. A. Kuznetsov, Explicit Hermite-type eigenvectors of the discrete Fourier transform. SIAM J. Matrix Anal. Appl. 36(4), 1443–1464 (2015). https://doi.org/10.1137/15M1006428

    Article  MathSciNet  Google Scholar 

  15. A. Kuznetsov, M. Kwaśnicki, Minimal Hermite-type eigenbasis of the discrete Fourier transform. J Fourier Anal. Appl. 25, 1053–1079 (2019). https://doi.org/10.1007/s00041-018-9600-z

    Article  MathSciNet  Google Scholar 

  16. J. Lima, L. Novaes, Image encryption based on the fractional Fourier transform over finite fields. Signal Process. 94, 521–530 (2014). https://doi.org/10.1016/j.sigpro.2013.07.020

    Article  Google Scholar 

  17. D. Majorkowska-Mech, A. Cariow, A low-complexity approach to computation of the discrete fractional Fourier transform. Circuits Syst. Signal Process. 36(10), 4118–4144 (2017). https://doi.org/10.1007/s00034-017-0503-z

    Article  Google Scholar 

  18. V. Namias, The fractional order Fourier transform and its application to quantum mechanics. IMA J. Appl. Math. 25(3), 241–265 (1980). https://doi.org/10.1093/imamat/25.3.241

    Article  MathSciNet  Google Scholar 

  19. S. Pei, W. Hsue, J. Ding, Discrete fractional Fourier transform based on new nearly tridiagonal commuting matrices. IEEE Trans. Signal Process. 54(10), 3815–3828 (2006). https://doi.org/10.1109/TSP.2006.879313

    Article  Google Scholar 

  20. R. Pelich, N. Longépé, G. Mercier et al., Vessel refocusing and velocity estimation on SAR imagery using the fractional Fourier transform. IEEE Trans. Geosci. Remote Sens. 54(3), 1670–1684 (2016). https://doi.org/10.1109/TGRS.2015.2487378

    Article  Google Scholar 

  21. M. V. N. V. Prasad, K. C. Ray, A. S. Dhar, FPGA implementation of discrete fractional Fourier transform. In: 2010 International Conference on Signal Processing and Communications (SPCOM) (2010), pp. 1–5. https://doi.org/10.1109/SPCOM.2010.5560491

  22. K.C. Ray, M.V.N.V. Prasad, A.S. Dhar, An efficient VLSI architecture for computation of discrete fractional Fourier transform. J. Signal Process. Syst. 90(11), 1569–1580 (2018). https://doi.org/10.1007/s11265-017-1281-3

    Article  Google Scholar 

  23. G.A.F. Seber, A Matrix Handbook for Statisticians, 1st edn. (Wiley, Hoboken, 2007)

    Book  Google Scholar 

  24. A. Serbes, Compact fractional Fourier domains. IEEE Signal Process. Lett. 24(4), 427–431 (2017). https://doi.org/10.1109/LSP.2017.2672860

    Article  Google Scholar 

  25. A. Serbes, L. Durak-Ata, Efficient computation of DFT commuting matrices by a closed-form infinite order approximation to the second differentiation matrix. Signal Process. 91(3), 582–589 (2011). https://doi.org/10.1016/j.sigpro.2010.05.002

    Article  Google Scholar 

  26. P. Sinha, S. Sarkar, A. Sinha et al., Architecture of a configurable centered discrete fractional Fourier transform processor. In: 2007 50th Midwest Symposium on Circuits and Systems (2007), pp. 329–332. https://doi.org/10.1109/MWSCAS.2007.4488600

  27. X. Su, R. Tao, X. Kang, Analysis and comparison of discrete fractional Fourier transforms. Signal Process. 160, 284–298 (2019). https://doi.org/10.1016/j.sigpro.2019.01.019

    Article  Google Scholar 

  28. J.E. Volder, The CORDIC trigonometric computing technique. IRE Trans. Electron. Comput. 8(3), 330–334 (1959). https://doi.org/10.1109/TEC.1959.5222693

    Article  Google Scholar 

  29. Q. Wang, M. Pepin, R.J. Beach et al., SAR-based vibration estimation using the discrete fractional Fourier transform. IEEE Trans. Geosci. Remote Sens. 50(10), 4145–4156 (2012). https://doi.org/10.1109/TGRS.2012.2187665

    Article  Google Scholar 

  30. R. Wang, P. Chen, D. Wang, FPGA-based implementation of discrete fractional Fourier transform algorithm. In: 2022 14th International Conference on Wireless Communications and Signal Processing (WCSP) (2022), pp. 511–515. https://doi.org/10.1109/WCSP55476.2022.10039232

  31. Xilinx, Xilinx 7 Series FPGAs Data Sheet: Overview (Xilinx, 2020). https://docs.xilinx.com/v/u/en-US/ds180_7Series_Overview

Download references

Funding

This work was supported in part by Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq) under Grants 310142/2020-2, 409543/2018-7 and 140151/2022-2, Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES), and Fundação de Amparo à Ciência e Tecnologia do Estado de Pernambuco (FACEPE) under Grant APQ-1226-3.04/22.

Author information

Author notes

  1. J. R. de Oliveira Neto and Juliano B. Lima are contributed equally to this work.

Authors and Affiliations

  1. Department of Electronics and Systems, Federal University of Pernambuco, Recife, Pernambuco, Brazil

    Breno C. Bispo & Juliano B. Lima

  2. Department of Mechanical Engineering, Federal University of Pernambuco, Recife, Pernambuco, Brazil

    José R. de Oliveira Neto

Authors
  1. Breno C. Bispo
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. José R. de Oliveira Neto
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Juliano B. Lima
    View author publications

    You can also search for this author in PubMed Google Scholar

Contributions

BCB, JRDON and JBL were involved in conceptualization; BCB, JRDON and JBL helped in methodology; BCB and JRDON contributed to formal analysis and investigation; BCB was involved in writing—original draft preparation; BCB, JRDON and JBL helped in writing—review and editing; JRDON and JBL contributed to resources; JRDON and JBL helped in supervision. All authors read and approved the final manuscript.

Corresponding author

Correspondence to Juliano B. Lima.

Ethics declarations

Conflict of interest

The authors declare that there is no conflict of interest.

Ethics approval

Not applicable.

Additional information

Publisher's Note

Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Rights and permissions

Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law.

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Bispo, B.C., de Oliveira Neto, J.R. & Lima, J.B. Hardware Architectures for Computing Eigendecomposition-Based Discrete Fractional Fourier Transforms with Reduced Arithmetic Complexity. Circuits Syst Signal Process 43, 593–614 (2024). https://doi.org/10.1007/s00034-023-02493-1

Download citation

  • Received:

  • Revised:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s00034-023-02493-1

Keywords

Search

Navigation