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FPGA-Based Real-Time Implementation of Bivariate Empirical Mode Decomposition

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Abstract

A field programmable gate array (FPGA)-based parallel architecture for the real-time and online implementation of the bivariate extension of the empirical mode decomposition (EMD) algorithm is presented. Multivariate extensions of EMD have attracted significant attention in recent years owing to their scope in applications involving multichannel and multidimensional data processing, e.g. biomedical engineering, condition monitoring, image fusion. However, these algorithms are computationally expensive due to the empirical and data-driven nature of these methods. That has hindered the utilisation of EMD, and particularly its bivariate and multivariate extensions, in real-time applications. The proposed parallel architecture is aimed at bridging this gap through real-time computation of the bivariate EMD algorithm. The crux of the architecture is the simultaneous computation of multiple signal projections, locating their local extrema and finally the calculation of their associated complex-valued envelopes for the estimation of local mean. The architecture is implemented on a Xilinx Kintex 7 FPGA and offers significant computational improvements over the existing software-based sequential implementations of bivariate EMD.

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Notes

  1. Any interpolation scheme can be used for this purpose, though the cubic spline interpolation is the most widely used.

  2. The detailed design and implementation for multiple complex envelope generation is discussed in the next subsection.

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Correspondence to Naveed ur Rehman.

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Malik, Q.W., Rehman, N.u., Gull, S. et al. FPGA-Based Real-Time Implementation of Bivariate Empirical Mode Decomposition. Circuits Syst Signal Process 38, 118–137 (2019). https://doi.org/10.1007/s00034-018-0844-2

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  • DOI: https://doi.org/10.1007/s00034-018-0844-2

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