Abstract
The paper presents a completely new realization of a current-mode power detector employing a four-quadrant CMOS analogue multiplier, integrator, zero-crossing detectors and a grounded capacitor. Based on the value of the integration of the original input signals, a calculation is performed using the definition formulas. The product of input current signals was directly introduced into the integration circuit, and its digital equivalent was subsequently formed. Signal-processing-related errors and errors bound were investigated and presented in the paper. Simulation, performed using HSPICE with \(0.25\,\upmu \hbox {m}\) technology, and experimental results confirmed the performance of the proposed circuit. The obtained results show that the scheme improves the detector’s accuracy to over 1 %, while widening the operating frequency range to up to 100 MHz. The maximum power consumptions of converter at ±2.5 V supply voltages amount to approximately 8.37 mW.
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Petrović, P.B. New CMOS Current-Mode Analogue to Digital Power Converter. Circuits Syst Signal Process 36, 1361–1378 (2017). https://doi.org/10.1007/s00034-016-0372-x
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DOI: https://doi.org/10.1007/s00034-016-0372-x