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Enhanced InGaAs/InAs/InGaAs Composite Channel MOSHEMT Device Performance by Using Double Gate Recessed Structure with HfO2 as Dielectric Materials

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Micro-Electronics and Telecommunication Engineering

Part of the book series: Lecture Notes in Networks and Systems ((LNNS,volume 179))

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Abstract

This work reports that the composite channel InGaAs, InAs and InGaAs thin, with dual delta-doped double recessed gate (DG) MOSHEMT, is 40 nm gate length, the barrier 3 nm and 15 nm thick channel, and this structure has been simulated in the TCAD Sentaurus simulation tool. The DC and RF characteristics of proposed device are characterized by different gate lengths along with different VDS. The novel design features included under this proposed structure, namely recessed high stem gate, thin barrier, dual gate, composite channel and the HfO2 as a dielectric material, are applicable for low leakage current along with Tera Hertz frequency applications. The simulation results show the exhibition of a high drain current of 1.38 × 10−3 A/µm, transconductance of 3.35 × 10−3 S/µm, threshold voltage of 0.13 V, cutoff and maximum frequency of oscillation of 791 and 995 GHz by the DGMOSHEMT devices at LG = 40 nm and VDS = 0.5 V. The findings are obtained  due to the superior electron transportation properties of a DG MOSHEMT structure with compound semiconductor III-V materials.

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References

  1. Kim TW, Kim DH, del Alamo JA (2009) 30 nm In 0.7 Ga 0.3 As Inverted-Type HEMTs with reduced gate leakage current for logic applications. In: 2009 IEEE international electron devices meeting (IEDM). IEEE, New York, pp 1–4 (2009)

    Google Scholar 

  2. Radhakrishnan SK, BaskaranSubramaniyan M, Nagarajan M (2018) Comparative assessment of InGaAs sub-channel and InAs composite channel double gate (DG)-HEMT for sub-millimeter wave applications. AEU-International Journal of Electronics and Communications 83 (2018): 462–469.

    Google Scholar 

  3. Kim TW, Kim DH, Del Alamo JA (2010) Logic characteristics of 40 nm thin-channel InAs HEMTs. In: 2010 22nd international conference on indium phosphide and related materials (IPRM). IEEE, New York, pp 1–4

    Google Scholar 

  4. Zhou X, Li Q, Tang CW, Lau KM (2012) 30-nm Inverted In0.53Ga0.47As MOSHEMTs on Si Substrate Grown by MOCVD With Regrown Source/Drain. IEEE Electron Device Lett 33(10):1384–1386

    Google Scholar 

  5. Saravana Kumar R, Mohanbabu A, Mohankumar N, Godwin Raj D (2018) Simulation of InGaAssubchannel DG-HEMTs for analogue/RF applications. Int J Electron 105(3):446–456

    Google Scholar 

  6. Yun D-Y, Jo H-B, Son S-W, Baek J-M, Lee J-H, Kim T-W, Kim D-H, Tsutsumi T, Sugiyama H, Matsuzaki H (2018) Impact of the source-to-drain spacing on the DC and RF Characteristics of InGaAs/InAlAs high-electron mobility transistors. IEEE Electron Device Lett 39(12):1844–1847

    Article  Google Scholar 

  7. Kim DH, Del Alamo JA (2010) 30-nm InAs PHEMTs with f T= 644 GHz and f max= 681 GHz. Institute of Electrical and Electronics Engineers.

    Google Scholar 

  8. Kuo CI, Hsu HT, Chang EY, Chang CY, Miyamoto Y, Datta S, Radosavljevic M, Huang G-W, Lee C-T (2008) RF and logic performance improvement of In0. 7Ga0. 3As/InAs/In0. 7Ga0. 3As composite-channel HEMT using gate-sinking technology. IEEE Electron Device Lett 29(4):290–293

    Google Scholar 

  9. Lee KW, Huang JS, Lee FM, Huang YS, Wang Y-H, Su SC, Chao BH, Chen CC (2007) Analytical study of the dc characteristics on the InAlAs/InGaAs metamorphic HEMT with oxidized InGaAs gate. In: 2007 IEEE conference on electron devices and solid-state circuits. IEEE, New York, pp 259–262

    Google Scholar 

  10. Nirmal D, Vijayakumar P, Shruti K, Mohankumar N (2013) Nanoscale channel engineered double gate MOSFET for mixed signal applications using high-k dielectric. Int J Circuit Theory Appl 41(6):608–618

    Article  Google Scholar 

  11. Liu H, Xiong Z, Sin JKO (2003) Implementation and characterization of the double-gate MOSFET using lateral solid-phase epitaxy IEEE Trans Electron Devices 50(6):1552–1555

    Google Scholar 

  12. Mohankumar N, Syamal B, Sarkar CK (2010) Influence of channel and gate engineering on the analog and RF performance of DG MOSFETs. IEEE Trans Electron Devices 57(4):820–826

    Google Scholar 

  13. Poornachandran R, Mohan Kumar N, Saravana Kumar R, Baskaran S (2020) Noise analysis of double gate composite InAs based HEMTs for high frequency applications. Microsyst Technol pp 1–9

    Google Scholar 

  14. Wichmann N, Duszynski I, Bollaert S, Mateos J, Wallart X, Cappy A (2004) 100 nm InAlAs/InGaAs double-gate HEMT using transferred substrate. In: IEDM technical digest. IEEE international electron devices meeting, 2004. IEEE, New York, pp 1023–1026

    Google Scholar 

  15. Mo JJ, Wichmann N, Roelens Y, Zaknoune M, Desplanque L, Wallart X, Bollaert S (2012) Lattice matched and PseudomorphicInGaAs MOSHEMT with fT of 200 GHz. In: 2012 International conference on indium phosphide and related materials. IEEE, New York, pp 44–47

    Google Scholar 

  16. Endoh A, Watanabe I, Mimura T (2012) Monte Carlo simulation of InGaAs/strained-InAs/InGaAs channel HEMTs considering self-consistent analysis of 2-dimensional electron gas. In: 2012 international conference on indium phosphide and related materials. IEEE, New York, pp 48–51

    Google Scholar 

  17. Kim D-H, Del Alamo JA (2010) Scalability of sub-100 nm InAs HEMTs on InP substrate for future logic applications. IEEE Trans Electr Devices 57(7):1504–1511

    Google Scholar 

  18. Vasallo BG, Wichmann N, Bollaert S, Roelens Y, Cappy A, González T, Pardo D, Mateos J (2007) Comparison between the dynamic performance of double-and single-gate AlInAs/InGaAs HEMTs. IEEE Trans Electr Devices 54(11):2815–2822

    Google Scholar 

  19. Sugiyama H, Hoshi T, Yokoyama H, Matsuzaki H (2012) Metal-organic vapor-phase epitaxy growth of InP-based HEMT structures withInGaAs/InAs composite channel. In: 2012 international conference on indium phosphide and related materials. IEEE, New York, pp 245–248

    Google Scholar 

  20. Xue F, Zhao H, Chen Y-T, Wang Y, Zhou F, Lee JC (2011) High-k InGaAs metal-oxide-semiconductor field-effect-transistors with various barrier layer materials. Appl Phys Lett 99(3):033507

    Article  Google Scholar 

  21. Xue F, Zhao H, Chen Y-T, Wang Y, Zhou F, Lee JC (2011) InAs inserted InGaAs buried channel metal-oxide-semiconductor field-effect-transistors with atomic-layer-deposited gate dielectric. Appl Phys Lett 98(8):082106

    Article  Google Scholar 

  22. Chang E-Y, Kuo C-I, Hsu H-T, Chiang C-Y, Miyamoto Y (2013) InAs thin-channel high-electron-mobility transistors with very high current-gain cutoff frequency for emerging submillimeter-wave applications. Appl Phys Express 6(3):034001

    Google Scholar 

  23. Ajayan J, Subash TD, Kurian D (2017) 20 nm high performance novel MOSHEMT on InP substrate for future high speed low power applications. Superlattices Microstruct 109:183–193

    Google Scholar 

  24. Alam MT, Islam SK (2006) A modified model for Si/SiGe MOS-gate delta-doped HEMTs. Microelectron J 37(9):938–942

    Google Scholar 

  25. Kim D-H, del Alamo JA (2009) Scalability of sub-100 nm thin-channel InAs PHEMTs. In: 2009 IEEE international conference on indium phosphide & related materials. IEEE, New York, pp 132–135

    Google Scholar 

  26. Kumar RS, Mohanbabu A, Mohankumar N, Godwin Raj D (2017) In0. 7Ga0. 3As/InAs/In0. 7Ga0. 3As composite-channel double-gate (DG)-HEMT devices for high-frequency applications. J Comput Electron 16(3):732–740

    Google Scholar 

  27. Jie H, Tianyi G, Haiying Z, Jingbo X, Xiaojun F, Hao Y, Jiebin N (2010) 120-nm gate-length In0. 7Ga0. 3As/In0. 52Al0. 48As InP-based HEMT. J Semiconduct 31(7):074008

    Google Scholar 

  28. Fatah F, Kuo C-I, Hsu H-T, Chiang C-Y, Hsu C-Y, Miyamoto Y, Chang EY (2012) Bias-dependent radio frequency performance for 40 nm InAs high-electron-mobility transistor with a cutoff frequency higher than 600 GHz. Japanese J Appl Phys 51(11R):110203

    Google Scholar 

  29. Wu YQ, Xu M, Wang RS, Koybasi O, Ye PD (2009) High performance deep-submicron inversion-Mode InGaAs MOSFETs with maximum G m exceeding 1.1 mS/µm: New HBr pretreatment and channel engineering. In: 2009 IEEE international electron devices meeting (IEDM). IEEE, New York, pp 1–4

    Google Scholar 

  30. Egard M, Ohlsson L, Borg BM, Lenrick F, Wallenberg R, Wernersson L-E, Lind E (2011) High transconductance self-aligned gate-last surface channel In 0.53 Ga 0.47 As MOSFET. In: 2011 international electron devices meeting. IEEE, New York, pp 13–2

    Google Scholar 

  31. Yonai Y, Kanazawa T, Ikeda S, Miyamoto Y (2011) High drain current (> 2A/mm) InGaAs channel MOSFET at V D= 0.5 V with shrinkage of channel length by InP anisotropic etching. In: 2011 international electron devices meeting. IEEE, New York, pp 13–3

    Google Scholar 

  32. Li Q, Zhou X, Tang CW, Lau KM (2013): Material and device characteristics of metamorphic In0.53Ga0.47As MOSHEMTs Grown on GaAs and Si Substrates by MOCVD. IEEE Trans Electron Devices 60(12):4112–4118

    Google Scholar 

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Correspondence to R. Saravana Kumar .

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Saravana Kumar, R., Mohankumar, N., Baskaran, S., Poornachandran, R. (2021). Enhanced InGaAs/InAs/InGaAs Composite Channel MOSHEMT Device Performance by Using Double Gate Recessed Structure with HfO2 as Dielectric Materials. In: Sharma, D.K., Son, L.H., Sharma, R., Cengiz, K. (eds) Micro-Electronics and Telecommunication Engineering. Lecture Notes in Networks and Systems, vol 179. Springer, Singapore. https://doi.org/10.1007/978-981-33-4687-1_49

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  • DOI: https://doi.org/10.1007/978-981-33-4687-1_49

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