Low-Hardware Digit-Serial Sequential Polynomial Basis Finite Field GF(2$^m$) Multiplier for Trinomials

Abstract

Finite field GF(2$^m$) multipliers are employed in practical applications such as elliptic curve cryptography (ECC) and Reed-Solomon encoders. Digit-level finite field multipliers are best suitable for applications that require low-hardware implementation while operating at speeds that conform to today’s high data rates. With the emergence of Internet of Things (IoT), many resource-constrained devices such as IoT edge devices came into proliferate usage. To secure these constrained devices, ECC must be implemented in these devices with low-hardware complexity. Hence, it requires to design efficient digit-serial finite field multipliers since the performance of ECC greatly depends on the performance of the finite field multiplier employed. Many efficient designs for digit-serial finite field multipliers are presented in the literature to achieve better area and time complexities. In this paper, we present an area-efficient sequential digit-serial finite field multiplier for trinomials. The hardware and time complexities of the proposed multiplier are estimated for GF(2$^{409}$) and compared with the similar multipliers available in the literature. The comparison shows that the proposed multiplier achieves lower hardware complexity. Therefore, the proposed multiplier is attractive for cost-effective high-speed applications such as IoT edge devices.