Abstract
Low-power technologies, which have taken over the electronics sector, are being studied in this scientific literature. Power dissipation is an important design parameter in VLSI circuits because it predicts the performance of battery-operated devices, which is important in biomedical and communication applications. It gets more difficult to construct high-performance, low-power systems on a chip, as chip size reduces and device density and complexity rise. Furthermore, due to increased design complexity below the 100 nm node, total power management on a device is becoming a severe concern. Leakage current is also important in the power management of low-power VLSI devices. Because leakage and dynamic power consumption account for a large portion of overall power consumption in micro and nanotechnologies, they are becoming more relevant design factors. In order to increase the battery life of portable devices, VLSI circuit design focuses on reducing leakage and dynamic power. The numerous approaches, tactics and power management techniques that may be employed to construct low-power circuit-based systems are addressed in this scientific literature review.
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Chauhan, P., Gupta, S. (2023). Challenges and Future Perspectives of Low-Power VLSI Circuits: A Study. In: Agrawal, R., Kishore Singh, C., Goyal, A., Singh, D.K. (eds) Modern Electronics Devices and Communication Systems. Lecture Notes in Electrical Engineering, vol 948. Springer, Singapore. https://doi.org/10.1007/978-981-19-6383-4_46
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DOI: https://doi.org/10.1007/978-981-19-6383-4_46
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