Skip to main content

A High-Gain Improved Linearity Folded Cascode LNA for Wireless Applicatıons

  • Conference paper
  • First Online:
Intelligent Sustainable Systems

Part of the book series: Lecture Notes in Networks and Systems ((LNNS,volume 458))

Abstract

This paper presents Folded Cascode(FC), Low-Noise Amplifier (LNA) designed for 5.2 GHz. Several techniques such as Complementary Current Reuse, diode-connected Forward Body Biasing, and linearity improvement have been used separately. The proposed LNA combines all the three techniques for low power consumption, gain enhancement and to have good linearity. Under Cadence Virtuoso environment, using 180 nm Complementary Metal–Oxide–Semiconductor (CMOS) technology, the designed LNA exhibits high gain (S21) of 27.4 dB followed by Noise Figure (NF) of 2.4 dB at a reduced supply voltage of 0.6 V. The other important parameters including reflection coefficient (S11) −12.5 dB, power dissipation (Pdc) 3.23 mW, and Third-order Input Intercept Point (IIP3) −4.43 dBm are achieved. This demonstrates the applicability of proposed LNA for wireless applications functioning in 5.2 GHz.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 219.00
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 279.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

References

  1. B. Razavi, CMOS technology characterization for analog and RF design. IEEE J. Solid-State Circ. 34, 268–276 (1999)

    Article  Google Scholar 

  2. T.H. Lee, 5-GHz CMOS wireless LANs. IEEE Trans. Microwave Theory Tech. 50, 268–280 (2002)

    Article  Google Scholar 

  3. T. Nguyen, C. Kim, et al., CMOS low-noise amplifier design optimization techniques. IEEE Trans. Micowave Theory Tech. 52, 1433–1442 (2004)

    Google Scholar 

  4. X.J. Li, Y.P. Zhang, CMOS Low noise amplifier design for microwave and mmWave applications. Progress Electromagnet. Res. 161, 57–85 (2018)

    Article  Google Scholar 

  5. M. Parvizi, K. Allidina, Mourad N. El-Gamal, An ultra-low-power wideband inductorless CMOS LNA with tunable active shunt-feedback. IEEE Trans. Microwave Theory Tech. 64, 1843–1853 (2016)

    Google Scholar 

  6. H. Hsieh, J. Wang, L. Lu, Gain-enhancement techniques for CMOS folded cascode LNAs at low-voltage operations. IEEE Trans. Microwave Theory Tech. 56, 1807–1816 (2008)

    Google Scholar 

  7. W.C. Wang, Capacitor cross-coupled fully-differential CMOS Folded cascode LNAs with ultra low power consumption. Wirel. Pers. Commun. 78, 45–55 (2014)

    Article  Google Scholar 

  8. R. Dai, Y. Zheng et al., A 0.5-V novel complementary current-reused CMOS LNA for 2.4 GHz medical application. J. Microelectron. 55, 64–69 (2016)

    Article  Google Scholar 

  9. E. Kargaran et al., A new gm boosting current reuse CMOS folded cascode LNA. IEICE Electron. Express 10 (2013)

    Google Scholar 

  10. H. Zhang, E. Sánchez-Sinencio, Linearization techniques for CMOS low noise amplifiers: a tutorial. IEEE Trans. Circ. Syst. I Regul. Pap. 58(1), 22–36 (2011)

    Article  MathSciNet  Google Scholar 

  11. E. Kargaran et al., Highly linear folded cascode LNA. IEICE Electron. Express 10 (2013)

    Google Scholar 

  12. V. Aparin, L.E. Larson, Linearization of monolithic LNAs using low-frequency low-impedance input termination, in Proceedings of the European Solid-State Circuits Conference (2003), pp. 137–140

    Google Scholar 

  13. V. Aparin, G. Brown, L.E. Larson, Linearization of CMOS LNAs via optimum gate biasing, in Proceedings of the IEEE International symposium on Circuits and Systems (2004), pp. 748–751

    Google Scholar 

  14. S. Lou, H.C. Luong, A linearization technique for RF receiver front-end using second-order intermodulation injection. IEEE J. Solid-State Circ. 43, 2404–2412 (2008)

    Article  Google Scholar 

  15. T.H. Jin, T.W. Kim, A 5.5-mW +9.4-dBm IIP3 1.8-dB NF CMOS LNA employing multiple gated transistors with capacitance desensitization. IEEE Trans. Microwave Theory Tech. 58, 2529–2537 (2010)

    Article  Google Scholar 

  16. Y.M. Kim, H. Han, T.W. Kim, A 0.6-V +4 dBm IIP3 LC folded cascode CMOS LNA with gm linearization. IEEE Trans. Circ. Syst. Express Briefs 60, 122–126 (2013)

    Article  Google Scholar 

  17. Z.S.M. Salim, M. Muhamad, H. Hussin, N. Ahmad, CMOS LNA linearization employing multiple gated transistors, in IEEE International Conference on Telecommunication Systems, Services, and Applications (TSSA) (2019)

    Google Scholar 

  18. L. Ma, Z.-G. Wang, J. Xu, N.M. Amin, A high linearity wideband common-gate LNA with differential active inductor. IEEE Trans. Circ. Syst. II Expr. Briefs 64, 402–406 (2017)

    Google Scholar 

  19. C.W. Park, Y. Ahn et al., Linearity improvement cascode low noise amplifier using double DS method with a tuned inductor. Int. J. Electron. 97, 847–855 (2014)

    Article  Google Scholar 

  20. S. Kumaravel et al., A high linearity and high gain folded cascode LNA for narrowband receiver applications. Microelectron. J. 54, 101–108 (2016)

    Article  Google Scholar 

  21. A.P. Tarighat, M. Yargholi, A CMOS low noise amplifier with employing noise cancellation and modified derivative superposition technique. Microelectronics 54, 116–125 (2016)

    Article  Google Scholar 

  22. R. Raja, B. Venkataramani, K. Hari Kishore, A 1-V 2.4 GHz low-power CMOS LNA using gain-boosting and derivative superposition techniques for WSN. Wirel. Pers. Commun. 96, 383–402 (2017)

    Article  Google Scholar 

  23. M. Rafati, S.R. Qasemi, P. Amiri, A 0.65 V, linearized cascade UWB LNA by application of modified derivative superposition technique in 130 nm CMOS technology. Analog Integr. Circ. Sig. Process. 99, 693–706 (2019)

    Article  Google Scholar 

  24. T. Kim, B. Kim, Post-linearization of cascode CMOS low noise amplifier using folded PMOS IMD Sinker. IEEE Microwave Wirel. Compon. Lett. 16, 182–184 (2006)

    Article  Google Scholar 

  25. C.P. Chang, W.C. Chien et al., Linearity improvement of cascode CMOS LNA using a diode connected NMOS transistor with a parallel RC circuit. Prog. Electromagnet. Res. C 17, 29–38 (2010)

    Article  Google Scholar 

  26. S. Asgaran, M.J. Deen, C.-H. Chen, Design of the ınput matching network of RF CMOSLNAs for low-power operation. IEEE Trans. Circ. Syst. I Regul. Pap. 54, 544–554 (2007)

    Google Scholar 

  27. C.S. Chang, J.C. Guo, Ultra-low voltage and low power UWB CMOS LNA design using forward body biases, in IEEE Radio Frequency Integrated Circuits Symposium (RFIC) (2013), pp. 173–176

    Google Scholar 

  28. V. Singh et al., A 0.7 V, Ultra-wideband common gate LNA with feedback body bias topology for wireless applications. J. Low Power Electron. Appl. 42 (2018)

    Google Scholar 

  29. T.P. Wang, Minimized device junction leakage current at forward-bias body and applications for low-voltage quadruple-stacked common-gate amplifier. IEEE Trans. Electron. Dev. 61, 1231–1236 (2014)

    Article  Google Scholar 

  30. M. Bansal, H. Singh, G. Sharma, A taxonomical review of multiplexer designs for electronic circuits and devices. J. Electron. 3(02), 77–88 (2021)

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to S. Bhuvaneshwari .

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2022 The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd.

About this paper

Check for updates. Verify currency and authenticity via CrossMark

Cite this paper

Bhuvaneshwari, S., Kanthamani, S. (2022). A High-Gain Improved Linearity Folded Cascode LNA for Wireless Applicatıons. In: Raj, J.S., Shi, Y., Pelusi, D., Balas, V.E. (eds) Intelligent Sustainable Systems. Lecture Notes in Networks and Systems, vol 458. Springer, Singapore. https://doi.org/10.1007/978-981-19-2894-9_47

Download citation

Publish with us

Policies and ethics