A Novel Simon Light Weight Block Cipher Implementation in FPGA

Abstract

For resource constrained devices, lightweight block cipher algorithm is highly indispensible. For low resource devices, use of light weight block ciphers ensures cost-efficiency. The most important problem in VLSI design implementation is balancing the parameter constraints such as power consumption, device utilization and latency. Light weight cryptography employs a cryptographic algorithm which indeed helps to reduce the resource constraints. The primary objective of the paper is to design an efficient Simon light weight block cipher implemented in FPGA. The Simon algorithm employing the structure for implementing XOR operations consumes more power, and it has critical path delay. But in our proposed system, clock gating and power gating methodology is utilized and it helps to reduce the delay and power consumption respectively. The design is implemented in Virtex-5 and Artix-7 FPGA devices and its performance is analyzed. From the obtained results, it is evident that the proposed methodology is efficient in terms of adaptive security level and also it is able to encrypt longer messages depending upon the sizes of encrypt and decrypt keys and blocks. Based on the obtained results, it is clearly viewed that the execution time and power consumption is highly reduced.