The Hybrid Approach for the Partitioning of VLSI Circuits

Abstract

Partitioning is one of the most important problems at the design stage during the Very Large Scale Integrated (VLSI) manufacture. The article provides a description of this problem and its formal statement as partitioning of a hypergraph into parts. Partitioning belongs to the NP-hard class of optimization problems. A combination of swarm intelligence and genetic search methods made it possible to develop a hybrid approach to partitioning of VLSI circuits. A distinctive feature of this approach is to divide search process in two stages. At the first stage, search space is reduced by allocation of areas with high objective function values on the basis of a bee colony optimization method. As a result, an effective initial population of alternative solutions is generated. At the second stage, optimization of obtained solutions can be implemented with the use of the genetic search method. The suggested approach is supported by a hybrid algorithm which can obtain quazi-optimal solutions in polynomial time and avoid falling into local optima. A new software application has been developed to confirm the effectiveness of the suggested approach and hybrid algorithm. Experiments have been carried out on the basis of IBM benchmarks. The results of experiments show that the quality of solutions obtained by the suggested algorithm exceeds on average of 5% the well-known partitioning algorithm hMetis. Time complexity of the developed algorithm can be represented as $O\left( {n^{2} } \right)$ in the best case and $O\left( {n^{3} } \right)$ in the worst case.