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A Survey of Security Attacks on Silicon Based Weak PUF Architectures

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Security in Computing and Communications (SSCC 2020)

Part of the book series: Communications in Computer and Information Science ((CCIS,volume 1364))

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Abstract

Physically Unclonable Functions (PUFs) are popular hardware-based security primitives that can derive chip signatures from the inherent characteristics of ICs. Due to their assumed security and cost advantages, one important category of PUFs, so-called weak PUFs which is used in numerous security applications such as device ID generation, IP protection and secure key storage. Nevertheless, a number of recent works have been reported several attacks on weak PUFs architectures. This paper presents a brief survey of existing attacks on silicon-based weak PUF architectures with their detailed comparison and associated countermeasures.

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References

  1. Amsaad, F., Choudhury, M., Chaudhuri, C.R., Niamat, M.: An innovative delay based algorithm to boost PUF security against machine learning attacks. In: 2016 Annual Connecticut Conference on Industrial Electronics, Technology Automation (CT-IETA), pp. 1–6, October 2016

    Google Scholar 

  2. Anagnostopoulos, N.A., Arul, T., Rosenstihl, M., Schaller, A., Gabmeyer, S., Katzenbeisser, S.: Low-temperature data remanence attacks against intrinsic SRAM PUFs. In: 2018 21st Euromicro Conference on Digital System Design (DSD), pp. 581–585. IEEE (2018)

    Google Scholar 

  3. Anandakumar, N.N., Hashmi, M.S., Sanadhya, S.K.: Efficient and lightweight FPGA-based hybrid PUFs with improved performance. Microprocess. Microsyst. 77, 103180 (2020)

    Article  Google Scholar 

  4. Anderson, J.H.: A PUF design for secure FPGA-based embedded systems. In: 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 1–6, January 2010

    Google Scholar 

  5. Aniello, L., Halak, B., Chai, P., Dhall, R., Mihalea, M., Wilczynski, A.: Anti-BlUFf: towards counterfeit mitigation in IC supply chains using blockchain and PUF. Int. J. Inf. Secur. (2020)

    Google Scholar 

  6. Bai, C., Zou, X., Dai, K.: A novel thyristor-based silicon physical unclonable function. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 24(1), 290–300 (2016)

    Google Scholar 

  7. Becker, G.T., Kumar, R., et al.: Active and passive side-channel attacks on delay based PUF designs. IACR Cryptology ePrint Archive 2014, 287 (2014)

    Google Scholar 

  8. Bernardini, R., Rinaldo, R.: Making random permutations from physically unclonable constants. Int. J. Inf. Secur. 16(3), 249–261 (2016). https://doi.org/10.1007/s10207-016-0324-2

    Article  Google Scholar 

  9. Bossuet, L., Ngo, X.T., Cherif, Z., Fischer, V.: A PUF based on a transient effect ring oscillator and insensitive to locking phenomenon. IEEE Trans. Emerg. Topics Comput. 2(1), 30–36 (2014)

    Article  Google Scholar 

  10. Cao, Y., Zhao, X., Ye, W., Han, Q., Pan, X.: A compact and low power RO PUF with high resilience to the EM side-channel attack and the SVM modelling attack of wireless sensor networks. Sensors 18, 322 (2018)

    Article  Google Scholar 

  11. Cherif, Z., Danger, J., Guilley, S., Bossuet, L.: An easy-to-design PUF based on a single oscillator: the loop PUF. In: 15th Euromicro Conference on Digital System Design, pp. 156–162, September 2012

    Google Scholar 

  12. Chuang, K., et al.: Physically unclonable function using CMOS breakdown position. In: 2017 IEEE International Reliability Physics Symposium (IRPS), pp. 4C–1.1-4C-1.7, April 2017

    Google Scholar 

  13. Chuang, K.-H., Bury, E., Degraeve, R., Kaczer, B., Linten, D., Verbauwhede, I.: A physically unclonable function using soft oxide breakdown featuring 0% native BER and 51.8 fJ/bit in 40-nm CMOS. IEEE J. Solid-State Circ. 54(10), 2765–2776 (2019)

    Google Scholar 

  14. Das, J., Scott, K., Rajaram, S., Burgett, D., Bhanja, S.: MRAM PUF: a novel geometry based magnetic PUF with integrated CMOS. IEEE Trans. Nanotechnol. 14(3), 436–443 (2015)

    Article  Google Scholar 

  15. Delvaux, J., Verbauwhede, I.: Fault injection modeling attacks on 65 nm arbiter and RO sum PUFs via environmental changes. IEEE Trans. Circuits Syst. I Regul. Pap. 61(6), 1701–1713 (2014)

    Article  Google Scholar 

  16. Gao, M., Lai, K., Zhang, J., Qu, G., Cui, A., Zhou, Q.: Reliable and anti-cloning PUFs based on configurable ring Oscillators. In: 2015 14th International Conference on Computer-Aided Design and Computer Graphics (CAD/Graphics), pp. 194–201, August 2015

    Google Scholar 

  17. Helfmeier, C., Boit, C., Nedospasov, D., Seifert, J.: Cloning physically unclonable functions. In: 2013 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), pp. 1–6, June 2013

    Google Scholar 

  18. Holcomb, D.E., Burleson, W.P., Fu, K.: Power-up SRAM state as an identifying fingerprint and source of true random numbers. IEEE Trans. Comput. 58(9), 1198–1210 (2009)

    Article  MathSciNet  Google Scholar 

  19. Kim, M., Moon, D., Yoo, S., Lee, S., Choi, Y.: Investigation of physically unclonable functions using flash memory for integrated circuit authentication. IEEE Trans. Nanotechnol. 14(2), 384–389 (2015)

    Article  Google Scholar 

  20. Koeberl, P., Koçabas, Ü., Sadeghi, A.: Memristor PUFs: a new generation of memory-based physically unclonable functions. In: Macii, E. (ed.) Design, Automation and Test in Europe, DATE 13, Grenoble, France, March 18–22, 2013, pp. 428–431. EDA Consortium, San Jose/ACM DL (2013)

    Google Scholar 

  21. Krishna, A.R., Narasimhan, S., Wang, X., Bhunia, S.: MECCA: a robust low-overhead PUF using embedded memory array. In: Preneel, B., Takagi, T. (eds.) CHES 2011. LNCS, vol. 6917, pp. 407–420. Springer, Heidelberg (2011). https://doi.org/10.1007/978-3-642-23951-9_27

    Chapter  Google Scholar 

  22. Kumar, S.S., Guajardo, J., Maes, R., Schrijen, G.-Ja., Tuyls, P.: The butterfly PUF protecting IP on every FPGA. In: 2008 IEEE International Workshop on Hardware-Oriented Security and Trust, pp. 67–70. IEEE (2008)

    Google Scholar 

  23. Lohrke, H., Tajik, S., Boit, C., Seifert, J.-P.: No place to hide: contactless probing of secret data on FPGAs. In: Gierlichs, B., Poschmann, A.Y. (eds.) CHES 2016. LNCS, vol. 9813, pp. 147–167. Springer, Heidelberg (2016). https://doi.org/10.1007/978-3-662-53140-2_8

    Chapter  Google Scholar 

  24. Maes, R., Tuyls, P., Verbauwhede, I.: Intrinsic PUFs from flip-flops on reconfigurable devices. In: 3rd Benelux Workshop Information and System Security, p. 17 (2008)

    Google Scholar 

  25. Mahmoud, A., Rührmair, U., Majzoobi, M., Koushanfar, F.: Combined Modeling and Side Channel Attacks on Strong PUFs. IACR Cryptology ePrint Archive 2013, 632 (2013)

    Google Scholar 

  26. Merli, D., Heyszl, J., Heinz, B., Schuster, D., Stumpf, F., Sigl, G.: Localized electromagnetic analysis of RO PUFs. In: 2013 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), pp. 19–24. IEEE (2013)

    Google Scholar 

  27. Merli, D., Schuster, D., Stumpf, F., Sigl, G.: Semi-invasive EM attack on FPGA RO PUFs and countermeasures. In: Proceedings of the Workshop on Embedded Systems Security, p. 2. ACM (2011)

    Google Scholar 

  28. Miskelly, J., Gu, C., Ma, Q., Cui, Y., Liu, W., O’Neill, M.: Modelling attack analysis of configurable ring oscillator (CRO) PUF designs. In: 2018 IEEE 23rd International Conference on Digital Signal Processing (DSP), pp. 1–5, November 2018

    Google Scholar 

  29. Nalla Anandakumar, N.: SCA resistance analysis on FPGA implementations of sponge based MAC PHOTON. In: Bica, I., Naccache, D., Simion, E. (eds.) SECITC 2015. LNCS, vol. 9522, pp. 69–86. Springer, Cham (2015). https://doi.org/10.1007/978-3-319-27179-8_6

    Chapter  Google Scholar 

  30. Nedospasov, D., Seifert, J., Helfmeier, C., Boit, C.: Invasive PUF analysis. In: 2013 Workshop on Fault Diagnosis and Tolerance in Cryptography, pp. 30–38, August 2013

    Google Scholar 

  31. Pappu, R., Recht, B., Taylor, J., Gershenfeld, N.: Physical one-way functions. Science 297(5589), 2026–2030 (2002)

    Article  Google Scholar 

  32. Rührmair, U., Sehnke, F., Sölter, J., Dror, G., Devadas, S., Schmidhuber, J.: Modeling attacks on physical unclonable functions. In: Proceedings of the 17th ACM Conference on Computer and Communications Security, CCS 2010, pp. 237–249. ACM (2010)

    Google Scholar 

  33. Sadana, S., Lele, A., Tsundus, S., Kumbhare, P., Ganguly, U.: A highly reliable and unbiased PUF based on differential OTP memory. IEEE Electron Device Lett. 39(8), 1159–1162 (2018)

    Article  Google Scholar 

  34. Sahoo, D.P., Bag, A., Patranabis, S., Mukhopadhyay, D., Chakraborty, R.S.: Fault-tolerant implementations of physically unclonable functions on FPGA. In: Chakraborty, R.S., Mathew, J., Vasilakos, A.V. (eds.) Security and Fault Tolerance in Internet of Things. IT, pp. 129–153. Springer, Cham (2019). https://doi.org/10.1007/978-3-030-02807-7_7

    Chapter  Google Scholar 

  35. Santikellur, P., Bhattacharyay, A., Chakraborty, R.S.: Deep learning based model building attacks on arbiter PUF compositions. IACR Cryptology ePrint Archive 2019, 566 (2019)

    Google Scholar 

  36. Schaller, A., et al.: Intrinsic Rowhammer PUFs: leveraging the Rowhammer effect for improved security. In: 2017 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), pp. 1–7, May 2017

    Google Scholar 

  37. Su, Y., Holleman, J., Otis, B.: A 1.6pJ/bit 96 % stable chip-ID generating circuit using process variations. In: 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (2007)

    Google Scholar 

  38. Suh, G.E., Devadas, S.: Physical unclonable functions for device authentication and secret key generation. In: 2007 44th ACM/IEEE Design Automation Conference, pp. 9–14. IEEE (2007)

    Google Scholar 

  39. Tajik, S., Nedospasov, D., Helfmeier, C., Seifert, J., Boit, C.: Emission analysis of hardware implementations. In: 2014 17th Euromicro Conference on Digital System Design, pp. 528–534, August 2014

    Google Scholar 

  40. Tajik, S., Lohrke, H., Ganji, F., Seifert, J.P., Boit, C.: Laser fault attack on physically unclonable functions. In: 2015 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC), pp. 85–96 (2015)

    Google Scholar 

  41. Tebelmann, L., Danger, J.L., Pehl, M.: Self-secured PUF: protecting the loop PUF by masking. Cryptology ePrint Archive, Report 2020/145 (2020). https://eprint.iacr.org/2020/145

  42. Tebelmann, L., Pehl, M., Immler, V.: Side-channel analysis of the TERO PUF. In: Polian, I., Stöttinger, M. (eds.) COSADE 2019. LNCS, vol. 11421, pp. 43–60. Springer, Cham (2019). https://doi.org/10.1007/978-3-030-16350-1_4

    Chapter  Google Scholar 

  43. Tehranipoor, F., Karimian, N., Yan, W., Chandy, J.A.: DRAM-based intrinsic physically unclonable functions for system-level security and authentication. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 25(3), 1085–1097 (2017)

    Google Scholar 

  44. Yamamoto, D., Sakiyama, K., Iwamoto, M., Ohta, K., Takenaka, M., Itoh, K.: Variety enhancement of PUF responses using the locations of random outputting RS latches. J. Cryptogr. Eng. 3(4), 197–211 (2012). https://doi.org/10.1007/s13389-012-0044-0

    Article  MATH  Google Scholar 

  45. Yao, Y., Kim, M., Li, J., Markov, I.L., Koushanfar, F.: ClockPUF: Physical Unclonable Functions based on clock networks. In: 2013 Design, Automation Test in Europe Conference Exhibition (DATE), pp. 422–427, March 2013

    Google Scholar 

  46. Zeitouni, S., Oren, Y., Wachsmann, C., Koeberl, P., Sadeghi, A.-R.: Remanence decay side-channel: the PUF case. IEEE Trans. Inf. Forensics Secur. 11(6), 1106–1116 (2015)

    Article  Google Scholar 

  47. Zhang, J.-L., Qu, G., Lv, Y.-Q., Zhou, Q.: A survey on silicon PUFs and recent advances in ring oscillator PUFs. J. Comput. Sci. Technol. 29(4), 664–678 (2014). https://doi.org/10.1007/s11390-014-1458-1

    Article  Google Scholar 

  48. Zhang, J., Wan, L.: CMOS: dynamic multi-key obfuscation structure for strong PUFs. CoRR abs/1806.02011 (2018)

    Google Scholar 

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Author information

Authors and Affiliations

  1. Hardware Security Research Lab, Society for Electronic Transactions and Security (SETS), Chennai, India

    Chintala Yehoshuva, R. Raja Adhithan & N. Nalla Anandakumar

Authors
  1. Chintala Yehoshuva
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  2. R. Raja Adhithan
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  3. N. Nalla Anandakumar
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Corresponding author

Correspondence to N. Nalla Anandakumar .

Editor information

Editors and Affiliations

  1. Indian Institute of Information Technology and Management - Kerala, Trivandrum, India

    Sabu M. Thampi

  2. Guangzhou University, Guangzhou, China

    Guojun Wang

  3. Howard University, Washington, DC, USA

    Danda B. Rawat

  4. University of Queensland, Brisbane, QLD, Australia

    Ryan Ko

  5. National Sun Yat-sen University, Kaohsiung, Taiwan

    Chun-I Fan

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Yehoshuva, C., Raja Adhithan, R., Nalla Anandakumar, N. (2021). A Survey of Security Attacks on Silicon Based Weak PUF Architectures. In: Thampi, S.M., Wang, G., Rawat, D.B., Ko, R., Fan, CI. (eds) Security in Computing and Communications. SSCC 2020. Communications in Computer and Information Science, vol 1364. Springer, Singapore. https://doi.org/10.1007/978-981-16-0422-5_8

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  • DOI: https://doi.org/10.1007/978-981-16-0422-5_8

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