Abstract
This paper explores the working principles of mixers, which is an integral part of superheterodyne transceiver system. Special emphasis has been led on the design of subharmonic mixers, which is a subclass of the mixer system by using 180-nm CMOS technology. The present paper highlights the design implementation of a 2× subharmonic mixer. From simulation results, it has been observed that the mixer attains 19 dBm IIP3, 12 dB conversion gain, 10 dB noise figure at 2–2.4 GHz RF range and 300–500 MHz of IF range. From 1.8 V supply, total power dissipation has been measured to be 3.8 mW.
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Acknowledgements
The authors are extremely thankful to SMDP-III(C2SD)(funded by Deity, under Ministry of Communication & IT, Government of India) for providing them with the required laboratory facilities and software to carry on the research works, and they also extend their sincere gratitude toward Integrated Circuit Centre of Electronics and Telecommunication Engineering Department of Jadavpur University for allowing them to use the laboratory.
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Dandapat, S., Das, S., Das, M., Chatterjee, S. (2021). Design of a Low-Power Linear Down-Conversion Mixer at 2.45 GHz CMOS 180-nm Technology. In: Das, N.R., Sarkar, S. (eds) Computers and Devices for Communication. CODEC 2019. Lecture Notes in Networks and Systems, vol 147. Springer, Singapore. https://doi.org/10.1007/978-981-15-8366-7_73
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DOI: https://doi.org/10.1007/978-981-15-8366-7_73
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