Test-Bench Setup for Testing and Calibration of a Newly Developed STS/MUCH-XYTER ASIC for CBM-MUCH Detectors

Abstract

Compressed Baryonic Matter (CBM) (Senger, J Phys Conf Ser 50(1):357 (2006), [1]) is one of the experiments of the upcoming Facility for Antiproton and Ion Research (FAIR) (Senger, J Phys Conf Ser 50(1):357 (2006), [1]) in Germany. CBM will take data in very high particle interactions rate of $10^7$ MHz and thus fast and high granular detectors are required to cope up with the rate and multi-hit probability. With about 10% overall detector hit occupancy, each readout channel may see the hit rate of up to 200 200 KHz. For such a high density and high rate detector readout, a specialized ASIC STS/MUCH-XYTER is designed. This ASIC is made with dual gain so that it can be used for the multiple detectors of the CBM experiment, e.g., Muon Chambers (MUCH) and Silicon Tracking Station (STS). This is a self-triggered hybrid ASIC consisting of 128 analog channels along with a digital back-end for reading out the data. Each channel along with pre-amplifier and shaping circuits also have a 5-bit flash ADC where all the 32 comparators of this ADC can be configured for a particular threshold setting. In this ASIC, low-gain setting is called as MUCH mode. We have developed a test-bench setup to test and calibrate this ASIC in low-gain mode to use it with MUCH detectors. The major task of this test-bench is to optimize all the bias parameters of this ASIC and to calibrate all the ADC channels such that the ASIC performs as per our expectation. The present paper focuses on the details of the test-bench setup and the testing methodologies used to test and calibrate/trim the registers on this ASIC. The paper will be concluded with the basic test results of the ASIC after calibration.